component
TPS65263-1QRHBRQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS65263-1QRHBRQ1
Texas Instruments · DC-DC Converters · VQFN-32-EP(5x5)
TPS65263-1QRHBRQ1 from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN3 | input | Enable for buck3; float to enable, and a resistor divider can be used to adjust the buck3 input UVLO. |
| 2 | SDA | bidirectional | I2C interface data pin; float or connect to GND to disable I2C communication. |
| 3 | SCL | input | I2C interface clock pin; float or connect to GND to disable I2C communication. |
| 4 | AGND | power_in | Analog ground common to buck controllers and other analog circuits; it must be routed separately from high-current power grounds to the (-) terminal of the VIN bypass capacitor. |
| 5 | VOUT2 | input | Buck2 output voltage sense pin. |
| 6 | FB2 | input | Feedback Kelvin sensing pin for buck2 output voltage; connect to the buck2 resistor divider. |
| 7 | COMP2 | passive | Error amplifier output and loop compensation pin for buck2; connect a series resistor and capacitor to compensate the peak current PWM loop. |
| 8 | SS2 | passive | Soft-start and tracking input for buck2 with an internal 5.2-µA pullup; soft-start time is programmed by a capacitor to ground. |
| 9 | BST2 | power_out | Boot-strapped supply to the buck2 high-side gate driver; connect a capacitor (recommended 47 nF) from BST2 to LX2. |
| 10 | LX2 | output | Buck2 switching node to the inductor and bootstrap capacitor; swing is from a diode drop below ground up to the PVIN2 voltage. |
| 11 | PGND2 | power_in | Power ground for buck2; connect as close as practical to the (-) terminal of the VIN2 input ceramic capacitor. |
| 12 | PVIN2 | power_in | Input power supply for buck2; connect as close as practical to the (+) terminal of an input ceramic capacitor (suggested 10 µF). |
| 13 | PVIN3 | power_in | Input power supply for buck3; connect as close as practical to the (+) terminal of an input ceramic capacitor (suggested 10 µF). |
| 14 | PGND3 | power_in | Power ground for buck3; connect as close as practical to the (-) terminal of the VIN3 input ceramic capacitor. |
| 15 | LX3 | output | Buck3 switching node to the inductor and bootstrap capacitor; swing is from a diode drop below ground up to the PVIN3 voltage. |
| 16 | BST3 | power_out | Boot-strapped supply to the buck3 high-side gate driver; connect a capacitor (recommended 47 nF) from BST3 to LX3. |
| 17 | SS3 | passive | Soft-start and tracking input for buck3 with an internal 5.2-µA pullup; soft-start time is programmed by a capacitor to ground. |
| 18 | COMP3 | passive | Error amplifier output and loop compensation pin for buck3; connect a series resistor and capacitor to compensate the peak current PWM loop. |
| 19 | FB3 | input | Feedback Kelvin sensing pin for buck3 output voltage; connect to the buck3 resistor divider. |
| 20 | PGOOD | output | Output voltage supervision pin; asserted high when all bucks are within the PGOOD monitor regulation range. |
| 21 | ROSC | input | Clock frequency adjustment pin; a resistor to ground sets the clock frequency, and the internal oscillator synchronizes when an external clock is applied. |
| 22 | FB1 | input | Feedback Kelvin sensing pin for buck1 output voltage; connect to the buck1 resistor divider. |
| 23 | COMP1 | passive | Error amplifier output and loop compensation pin for buck1; connect a series resistor and capacitor to compensate the peak current PWM loop. |
| 24 | SS1 | passive | Soft-start and tracking input for buck1 with an internal 5.2-µA pullup; soft-start time is programmed by a capacitor to ground. |
| 25 | BST1 | power_out | Boot-strapped supply to the buck1 high-side gate driver; connect a capacitor (recommended 47 nF) from BST1 to LX1. |
| 26 | LX1 | output | Buck1 switching node to the inductor and bootstrap capacitor; swing is from a diode drop below ground up to the PVIN1 voltage. |
| 27 | PGND1 | power_in | Power ground for buck1; connect as close as practical to the (-) terminal of the VIN1 input ceramic capacitor. |
| 28 | PVIN1 | power_in | Input power supply for buck1; connect as close as practical to the (+) terminal of an input ceramic capacitor (suggested 10 µF). |
| 29 | VIN | power_in | Buck controller power supply; operating input range is 4 V to 18 V per the recommended operating conditions. |
| 30 | V7V | power_out | Internal LDO output for the gate driver and internal controller; connect a 10-µF ceramic capacitor from this pin to power ground. |
| 31 | EN1 | input | Enable for buck1; float to enable, and a resistor divider can be used to adjust the buck1 input UVLO. |
| 32 | EN2 | input | Enable for buck2; float to enable, and a resistor divider can be used to adjust the buck2 input UVLO. |
| 33 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | Power Supply Chip |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
TPS65263-1QRHBRQ1 - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
tps65263-1qrhbrq1-etched.step/tps65263-1qrhbrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps65263-1qrhbrq1.step/tps65263-1qrhbrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (48 pp, sha256
80d3442bf670d35c, retrieved 2026-10-12, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).