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ADC1173CIMTCX

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Texas Instruments Analog To Digital Converters (ADC), TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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ADC1173CIMTCX

Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-24

ADC1173CIMTCX from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input CMOS/TTL compatible digital input that enables the digital outputs when low and places them in high impedance state when high.
2 DVSS power_in Ground return for the digital supply.
3 D0 tri_state Conversion data digital output pin (LSB), valid just after rising edge of CLK input, enabled by OE low.
4 D1 tri_state Conversion data digital output pin, valid just after rising edge of CLK input, enabled by OE low.
5 D2 tri_state Conversion data digital output pin, valid just after rising edge of CLK input, enabled by OE low.
6 D3 tri_state Conversion data digital output pin, valid just after rising edge of CLK input, enabled by OE low.
7 D4 tri_state Conversion data digital output pin, valid just after rising edge of CLK input, enabled by OE low.
8 D5 tri_state Conversion data digital output pin, valid just after rising edge of CLK input, enabled by OE low.
9 D6 tri_state Conversion data digital output pin, valid just after rising edge of CLK input, enabled by OE low.
10 D7 tri_state Conversion data digital output pin (MSB), valid just after rising edge of CLK input, enabled by OE low.
11 DVDD power_in Positive digital supply pin, connect to +3V source, bypass with 10µF and 0.1µF ceramic capacitors.
12 CLK input CMOS/TTL compatible digital clock input, VIN sampled on falling edge of CLK.
13 DVDD power_in Positive digital supply pin, connect to +3V source, bypass with 10µF and 0.1µF ceramic capacitors.
14 AVDD power_in Positive analog supply pin, connect to +3V source, bypass with 10µF and 0.1µF ceramic capacitors.
15 AVDD power_in Positive analog supply pin, connect to +3V source, bypass with 10µF and 0.1µF ceramic capacitors.
16 VRTS input Reference Top Bias with internal pull-up resistor, short to VRT to self bias the reference ladder.
17 VRT input Analog input for high side of reference ladder, nominal range 1.0V to AVDD, bypass well.
18 AVDD power_in Positive analog supply pin, connect to +3V source, bypass with 10µF and 0.1µF ceramic capacitors.
19 VIN power_in Analog signal input, conversion range is VRB to VRT.
20 AVSS power_in Ground return for the analog supply, connect close to ADC1173 package.
21 AVSS power_in Ground return for the analog supply, connect close to ADC1173 package.
22 VRBS input Reference Bottom Bias with internal pull down resistor, short to VRB to self bias the reference ladder.
23 VRB input Analog input for low side of reference ladder, nominal range 0V to 2.0V, bypass well.
24 DVSS power_in Ground return for the digital supply.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-24
Category Data Acquisition
Pins 24

CAD (KiCad official)

  • Symbol: ADC1173CIMTCX
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: adc1173cimtcx-etched.step / adc1173cimtcx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adc1173cimtcx.step / adc1173cimtcx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 d082ff2da3517ea6, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF