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TRF7961RHBR

Public Made by Adom

by adom

Texas Instruments RF Chips, VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TRF7961RHBR

Texas Instruments · RF Chips · VQFN-32-EP(5x5)

TRF7961RHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD_A power_out Internal regulated supply, 2.7 V to 3.4 V, for analog circuitry.
2 VIN power_in External supply input to the chip, 2.7 V to 5.5 V.
3 VDD_RF power_out Internal regulated supply, 2.7 V to 5 V, normally connected to VDD_PA (pin 4).
4 VDD_PA power_in Supply for the PA; normally connected externally to VDD_RF (pin 3).
5 TX_OUT output RF output with selectable output power of 100 mW at 8 Ω or 200 mW at 4 Ω with VDD = 5 V.
6 VSS_RF power_in Negative supply for the PA; normally connected to circuit ground.
7 VSS_RX power_in Negative supply for the RX inputs; normally connected to circuit ground.
8 RX_IN1 input RX input used for AM reception.
9 RX_IN2 input RX input used for PM reception.
10 VSS power_in Chip substrate ground.
11 BAND_GAP output Band-gap voltage of 1.6 V, an internal analog voltage reference that must be AC-bypassed to ground.
12 ASK/OOK bidirectional In direct mode selects ASK or OOK modulation (0 = ASK, 1 = OOK); can also be configured to provide the received analog signal output (ANA_OUT).
13 IRQ output Interrupt request output to prompt the MCU for attention when a PICC or VICC response is detected.
14 MOD input External modulation input used in direct mode.
15 VSS_A power_in Negative supply for internal analog circuits; normally connected to circuit ground.
16 VDD_I/O power_in Supply for I/O communications, 1.8 V to 5.5 V; connect to VIN for 5-V communication, VDD_X for 3.3-V communication, or any voltage from 1.8 V to 5.5 V.
17 I/O_0 bidirectional I/O pin for parallel communication; unused in SPI modes where it is hardwired to VSS or VDD per the interface table.
18 I/O_1 bidirectional I/O pin for parallel communication; hardwired to VDD or VSS when SPI is used.
19 I/O_2 bidirectional I/O pin for parallel communication; hardwired to VDD when SPI is used.
20 I/O_3 bidirectional I/O pin for parallel communication.
21 I/O_4 bidirectional I/O pin for parallel communication; serves as slave select (SS) in SPI with SS.
22 I/O_5 bidirectional I/O pin for parallel communication; provides the strobe output clock for serial communication and the data clock output in direct mode.
23 I/O_6 bidirectional I/O pin for parallel communication; MISO for SPI, and serial bit data output in direct mode 1 or subcarrier signal in direct mode 0.
24 I/O_7 bidirectional I/O pin for parallel communication; MOSI for SPI.
25 EN2 input Pulse enable and selection of power-down mode; if connected to VIN, VDD_X stays active during power down to support the MCU, and it can also be used for pulse wake-up from power-down.
26 DATA_CLK input Clock input for MCU communication in both parallel and serial modes.
27 SYS_CLK output Clock for the MCU at 3.39, 6.78, or 13.56 MHz when EN = 1; if EN = 0 and EN2 = 1, the system clock is set to 60 kHz.
28 EN input Chip enable input; when EN = 0 the chip is in power-down mode.
29 VSS_D power_in Negative supply for internal digital circuits; normally connected to circuit ground.
30 OSC_OUT output Crystal oscillator output for the single external 13.56 MHz crystal.
31 OSC_IN input Crystal oscillator input for the single external 13.56 MHz crystal.
32 VDD_X power_out Internally regulated supply, 2.7 V to 3.4 V, for external circuitry (MCU).
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-32-EP(5x5)
Category Radio Frequency Chip/Antenna
Pins 33

CAD (KiCad official)

  • Symbol: TRF7961RHBR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: trf7961rhbr-etched.step / trf7961rhbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); trf7961rhbr.step / trf7961rhbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (55 pp, sha256 34e4b915ecd05efb, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF