component

SN74LS02N

Public Made by Adom

by adom

lingxingic Gates, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icssn74ls02nfactory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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SN74LS02N

lingxingic · Gates · DIP-14

SN74LS02N from lingxingic, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1Y output Gate 1 data output (NOR of 1A and 1B).
2 1A input Gate 1 data input A; input has built-in clamp diode so it can be tied to voltages above VCC through a current-limiting resistor.
3 1B input Gate 1 data input B; input has built-in clamp diode so it can be tied to voltages above VCC through a current-limiting resistor.
4 2Y output Gate 2 data output (NOR of 2A and 2B).
5 2A input Gate 2 data input A; input has built-in clamp diode so it can be tied to voltages above VCC through a current-limiting resistor.
6 2B input Gate 2 data input B; input has built-in clamp diode so it can be tied to voltages above VCC through a current-limiting resistor.
7 GND power_in Ground (0 V).
8 3A input Gate 3 data input A; input has built-in clamp diode so it can be tied to voltages above VCC through a current-limiting resistor.
9 3B input Gate 3 data input B; input has built-in clamp diode so it can be tied to voltages above VCC through a current-limiting resistor.
10 3Y output Gate 3 data output (NOR of 3A and 3B).
11 4A input Gate 4 data input A; input has built-in clamp diode so it can be tied to voltages above VCC through a current-limiting resistor.
12 4B input Gate 4 data input B; input has built-in clamp diode so it can be tied to voltages above VCC through a current-limiting resistor.
13 4Y output Gate 4 data output (NOR of 4A and 4B).
14 VCC power_in Supply voltage; recommended 2.0 V to 6.0 V, absolute maximum -0.5 V to +7 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package DIP-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V Tamb=25°C, GND=0V 7
Input clamp current IIK 20 mA VI<-0.5V or VI>VCC+0.5V; printed ±20 7
Output clamp current IOK 20 mA VO<-0.5V or VO>VCC+0.5V; printed ±20 7
Output current IO 25 mA -0.5V<VO<VCC+0.5V; printed ±25 7
Supply current ICC 50 mA 7
Ground current IGND -50 mA 7
Total power dissipation Ptot 500 mW 7
Storage temperature Tstg -65 150 °C 7
Soldering temperature (DIP) TL 245 °C 10 s, DIP 7
Supply voltage VCC 2 5 6 V 7
Input rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 7
Input rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 7
Input rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 7
Operating ambient temperature Tamb -40 125 °C 7
Input voltage VI 0 V upper limit printed as VCC 7
Output voltage VO 0 V upper limit printed as VCC 7
High-level input voltage VIH 1.5 1.2 V VCC=2.0V, Tamb=25°C 8
High-level input voltage VIH 3.15 2.4 V VCC=4.5V, Tamb=25°C 8
High-level input voltage VIH 4.2 3.2 V VCC=6.0V, Tamb=25°C 8
Low-level input voltage VIL 0.8 0.5 V VCC=2.0V, Tamb=25°C 8
Low-level input voltage VIL 2.1 1.35 V VCC=4.5V, Tamb=25°C 8
Low-level input voltage VIL 2.8 1.8 V VCC=6.0V, Tamb=25°C 8
High-level output voltage VOH 1.9 2 V VI=VIH or VIL; IO=-20uA; VCC=2.0V; Tamb=25°C 8
High-level output voltage VOH 4.4 4.5 V VI=VIH or VIL; IO=-20uA; VCC=4.5V; Tamb=25°C 8
High-level output voltage VOH 5.9 6 V VI=VIH or VIL; IO=-20uA; VCC=6.0V; Tamb=25°C 8
High-level output voltage VOH 3.98 4.32 V VI=VIH or VIL; IO=-4.0mA; VCC=4.5V; Tamb=25°C 8
High-level output voltage VOH 5.48 5.81 V VI=VIH or VIL; IO=-5.2mA; VCC=6.0V; Tamb=25°C 8
Low-level output voltage VOL 0 0.1 V VI=VIH or VIL; IO=20uA; VCC=2.0V; Tamb=25°C 8
Low-level output voltage VOL 0.15 0.26 V VI=VIH or VIL; IO=4.0mA; VCC=4.5V; Tamb=25°C 8
Low-level output voltage VOL 0.16 0.26 V VI=VIH or VIL; IO=5.2mA; VCC=6.0V; Tamb=25°C 8
Input leakage current II -1 1 uA VI=VCC or GND; VCC=6.0V; Tamb=25°C; printed ±1 8
Quiescent supply current ICC 2 uA VI=VCC or GND; IO=0A; VCC=6.0V; Tamb=25°C 8
High-level input voltage VIH 1.5 V VCC=2.0V, Tamb=-40~+125°C 10
High-level input voltage VIH 3.15 V VCC=4.5V, Tamb=-40~+125°C 10
High-level input voltage VIH 4.2 V VCC=6.0V, Tamb=-40~+125°C 10
Low-level input voltage VIL 0.5 V VCC=2.0V, Tamb=-40~+125°C 10
Low-level input voltage VIL 1.35 V VCC=4.5V, Tamb=-40~+125°C 10
Low-level input voltage VIL 1.8 V VCC=6.0V, Tamb=-40~+125°C 10
High-level output voltage VOH 1.9 V VI=VIH or VIL; IO=-20uA; VCC=2.0V; Tamb=-40~+125°C 10
High-level output voltage VOH 4.4 V VI=VIH or VIL; IO=-20uA; VCC=4.5V; Tamb=-40~+125°C 10
High-level output voltage VOH 5.9 V VI=VIH or VIL; IO=-20uA; VCC=6.0V; Tamb=-40~+125°C 10
High-level output voltage VOH 3.7 V VI=VIH or VIL; IO=-4.0mA; VCC=4.5V; Tamb=-40~+125°C 10
High-level output voltage VOH 5.2 V VI=VIH or VIL; IO=-5.2mA; VCC=6.0V; Tamb=-40~+125°C 10
Low-level output voltage VOL 0.1 V VI=VIH or VIL; IO=20uA; VCC=2.0V; Tamb=-40~+125°C 10
Low-level output voltage VOL 0.4 V VI=VIH or VIL; IO=4.0mA; VCC=4.5V; Tamb=-40~+125°C 10
Input leakage current II -1 1 uA VI=VCC or GND; VCC=6.0V; Tamb=-40~+125°C; printed ±1 10
Quiescent supply current ICC 40 uA VI=VCC or GND; IO=0A; VCC=6.0V; Tamb=-40~+125°C 10
Propagation delay nA, nB to nY tpd 135 ns VCC=2.0V, Tamb=-40~+125°C 12
Propagation delay nA, nB to nY tpd 27 ns VCC=4.5V, Tamb=-40~+125°C 12
Propagation delay nA, nB to nY tpd 23 ns VCC=6.0V, Tamb=-40~+125°C 12
Transition time tt 110 ns VCC=2.0V, Tamb=-40~+125°C 12
Transition time tt 22 ns VCC=4.5V, Tamb=-40~+125°C 12
Transition time tt 19 ns VCC=6.0V, Tamb=-40~+125°C 12
Input capacitance CI 3.5 pF Tamb=25°C 8

CAD (KiCad official)

  • Symbol: SN74LS02N
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ls02n-etched.step / sn74ls02n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls02n.step / sn74ls02n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (17 pp, sha256 671da4b84f8a214a, retrieved 2026-10-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF