component
TPS2482PWR
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS2482PWR
Texas Instruments · Supervisor And Reset ICs · TSSOP-20
TPS2482PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SDA | bidirectional | Serial-bus data line, open-drain input/output; the absolute maximum voltage on SDA is -0.3 V to 6 V. |
| 2 | SCL | input | Serial-bus clock line, high-impedance input; SCL is limited to -0.3 V to (VS + 0.3) V. |
| 3 | ALERT | output | Open-drain multi-function serial-bus alert output, similar to the SMBus Alert function, with an absolute maximum voltage of 6 V. |
| 4 | VS | power_in | Monitor-section bias-supply input for POR1, control logic, ADC and serial bus, typically 2.7 V to 5.5 V. |
| 5 | N/C | unconnected | No connection; tie to GND or float. |
| 6 | EN | input | Hotswap-section enable input; the GATE driver is enabled when POR2 and UVLO are satisfied and the EN upper threshold is exceeded, with an absolute maximum of -0.3 V to 100 V. |
| 7 | VREF | power_in | Reference voltage output used to set the power-limit threshold on PROG; reference source current is recommended at 0 to 1 mA, with 2 mA absolute maximum. |
| 8 | PROG | input | Pass-MOSFET power-limit programming input, normally 0.4 V to 4 V from a resistor divider from VREF; voltages greater than 4 V must not be applied. |
| 9 | TIMER | input | Fault-timing capacitor connection to GND; TIMER latches off the TPS2482 at 4 V and must be tied to ground if the fault-timer feature is not used, and no external voltage may be applied. |
| 10 | GND | power_in | System ground; common reference for all other input and output voltages. |
| 11 | PG | output | Open-drain power-good output that goes high-impedance after pass-MOSFET VDS falls below 1.25 V and a 9-ms deglitch, and is held low when VDS is above 2.7 V or UVLO is active; absolute maximum output voltage is 100 V. |
| 12 | OUT | input | Input sensing pass-MOSFET source voltage for power-limit protection and PG state determination; if the load can drive OUT below ground, a clamp diode from OUT to GND is needed to keep VOUT above -0.3 V. |
| 13 | GATE | output | Pass-MOSFET gate-drive output with a 22 µA pull-up from the charge pump and a pull-down of at least 75 mA; absolute maximum output voltage is -0.3 V to 100 V. |
| 14 | SENSE | input | Input sensing pass-MOSFET drain voltage and the downstream side of the current-shunt RS; absolute maximum input voltage is -0.3 V to 100 V and it must not be driven to a large difference from VCC. |
| 15 | VCC | power_in | Hotswap-section bias-supply input and positive reference for shunt sensing; it must exceed the POR2 threshold (about 6 V) and UVLO turn-on (about 8.4 V), with a recommended range of 9 V to 80 V. |
| 16 | GND | power_in | System ground; common reference for all other input and output voltages. |
| 17 | VINM | input | Kelvin-connected negative (load) side of the current-sense resistor, also used to measure bus voltage to GND; monitor input range is 0 V to 36 V. |
| 18 | VINP | input | Kelvin-connected positive (source) side of the current-sense resistor; monitor sensing input range is 0 V to 36 V. |
| 19 | A1 | input | Serial-bus address input; connect to GND, SDA, SCL, or VS to select the slave address per Table 8. |
| 20 | A0 | input | Serial-bus address input; connect to GND, SDA, SCL, or VS to select the slave address per Table 8. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Power Management (PMIC) |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
TPS2482PWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
tps2482pwr-etched.step/tps2482pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2482pwr.step/tps2482pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (58 pp, sha256
4af3cee11d85aa57, retrieved 2026-10-08, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).