component
MSP430F415IPMR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430F415IPMR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
MSP430F415IPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Digital supply voltage positive terminal supplying all parts except those via AVCC. |
| 2 | P6.3 | bidirectional | General-purpose digital I/O. |
| 3 | P6.4 | bidirectional | General-purpose digital I/O. |
| 4 | P6.5 | bidirectional | General-purpose digital I/O. |
| 5 | P6.6 | bidirectional | General-purpose digital I/O. |
| 6 | P6.7/SVSIN | bidirectional | General-purpose digital I/O and SVS analog input. |
| 7 | NC | unconnected | Not internally connected; connection to VSS recommended. |
| 8 | XIN | input | Input port for crystal oscillator XT1 accepting standard or watch crystals. |
| 9 | XOUT | output | Output terminal of crystal oscillator XT1. |
| 10 | AVSS2 | power_in | Negative terminal supplying SVS, brownout, oscillator, and comparator_A; externally connected to DVSS. |
| 11 | NC | unconnected | Not internally connected; connection to VSS recommended. |
| 12 | P5.1/S0 | bidirectional | General-purpose digital I/O and LCD segment output 0. |
| 13 | P5.0/S1 | bidirectional | General-purpose digital I/O and LCD segment output 1. |
| 14 | P4.7/S2 | bidirectional | General-purpose digital I/O and LCD segment output 2. |
| 15 | P4.6/S3 | bidirectional | General-purpose digital I/O and LCD segment output 3. |
| 16 | P4.5/S4 | bidirectional | General-purpose digital I/O and LCD segment output 4. |
| 17 | P4.4/S5 | bidirectional | General-purpose digital I/O and LCD segment output 5. |
| 18 | P4.3/S6 | bidirectional | General-purpose digital I/O and LCD segment output 6. |
| 19 | P4.2/S7 | bidirectional | General-purpose digital I/O and LCD segment output 7. |
| 20 | P4.1/S8 | bidirectional | General-purpose digital I/O and LCD segment output 8. |
| 21 | P4.0/S9 | bidirectional | General-purpose digital I/O and LCD segment output 9. |
| 22 | P3.7/S10 | bidirectional | General-purpose digital I/O and LCD segment output 10. |
| 23 | P3.6/S11 | bidirectional | General-purpose digital I/O and LCD segment output 11. |
| 24 | P3.5/S12 | bidirectional | General-purpose digital I/O and LCD segment output 12. |
| 25 | P3.4/S13 | bidirectional | General-purpose digital I/O and LCD segment output 13. |
| 26 | P3.3/S14 | bidirectional | General-purpose digital I/O and LCD segment output 14. |
| 27 | P3.2/S15 | bidirectional | General-purpose digital I/O and LCD segment output 15. |
| 28 | P3.1/S16 | bidirectional | General-purpose digital I/O and LCD segment output 16. |
| 29 | P3.0/S17 | bidirectional | General-purpose digital I/O and LCD segment output 17. |
| 30 | P2.7/S18 | bidirectional | General-purpose digital I/O and LCD segment output 18. |
| 31 | P2.6/CAOUT/S19 | bidirectional | General-purpose digital I/O, Comparator_A output, and LCD segment output 19. |
| 32 | P2.5/TA1CLK/S20 | bidirectional | General-purpose digital I/O, Timer1_A clock input, and LCD segment output 20. |
| 33 | P2.4/TA1.4/S21 | bidirectional | General-purpose digital I/O, Timer1_A capture with CCI4A input and compare with Out4 output, and LCD segment output 21. |
| 34 | P2.3/TA1.3/S22 | bidirectional | General-purpose digital I/O, Timer1_A capture with CCI3A input and compare with Out3 output, and LCD segment output 22. |
| 35 | P2.2/TA1.2/S23 | bidirectional | General-purpose digital I/O, Timer1_A capture with CCI2A input and compare with Out2 output, and LCD segment output 23. |
| 36 | COM0 | output | LCD common output COM0 used for LCD backplanes. |
| 37 | P5.2/COM1 | bidirectional | General-purpose digital I/O and LCD common output COM1 used for LCD backplanes. |
| 38 | P5.3/COM2 | bidirectional | General-purpose digital I/O and LCD common output COM2 used for LCD backplanes. |
| 39 | P5.4/COM3 | bidirectional | General-purpose digital I/O and LCD common output COM3 used for LCD backplanes. |
| 40 | R03 | input | Input port of fourth positive (lowest) analog LCD level V5. |
| 41 | P5.5/R13 | bidirectional | General-purpose digital I/O and input port of third most positive analog LCD level V4 or V3. |
| 42 | P5.6/R23 | bidirectional | General-purpose digital I/O and input port of second most positive analog LCD level V2. |
| 43 | P5.7/R33 | bidirectional | General-purpose digital I/O and output port of most positive analog LCD level V1. |
| 44 | P2.1/TA1.1 | bidirectional | General-purpose digital I/O and Timer1_A capture with CCI1A input and compare with Out1 output. |
| 45 | P2.0/TA0.2 | bidirectional | General-purpose digital I/O and Timer0_A capture with CCI2A input and compare with Out2 output. |
| 46 | P1.7/CA1 | bidirectional | General-purpose digital I/O and Comparator_A input. |
| 47 | P1.6/CA0 | bidirectional | General-purpose digital I/O and Comparator_A input. |
| 48 | P1.5/TA0CLK/ACLK | bidirectional | General-purpose digital I/O, Timer0_A clock input, and ACLK output. |
| 49 | P1.4/TA1.0 | bidirectional | General-purpose digital I/O and Timer1_A capture with CCI0A input and compare with Out0 output. |
| 50 | P1.3/TA1.0/SVSOUT | bidirectional | General-purpose digital I/O, Timer1_A capture with CCI0B input, and SVS comparator output. |
| 51 | P1.2/TA0.1 | bidirectional | General-purpose digital I/O and Timer0_A capture with CCI1A input and compare with Out1 output. |
| 52 | P1.1/TA0.0/MCLK | bidirectional | General-purpose digital I/O, Timer0_A capture with CCI0B input (input only on this pin), MCLK output, and BSL receive. |
| 53 | P1.0/TA0.0 | bidirectional | General-purpose digital I/O, Timer0_A capture with CCI0A input and compare with Out0 output, and BSL transmit. |
| 54 | TDO/TDI | bidirectional | Test data output port and programming data input terminal. |
| 55 | TDI/TCLK | input | Test data input and test clock input with device protection fuse connected. |
| 56 | TMS | input | Test mode select input port for device programming and test. |
| 57 | TCK | input | Test clock input port for device programming and test. |
| 58 | RST/NMI | input | Reset input and nonmaskable interrupt input port. |
| 59 | P6.0 | bidirectional | General-purpose digital I/O. |
| 60 | P6.1 | bidirectional | General-purpose digital I/O. |
| 61 | P6.2 | bidirectional | General-purpose digital I/O. |
| 62 | AVSS1 | power_in | Negative terminal supplying SVS, brownout, oscillator, and comparator_A; externally connected to DVSS. |
| 63 | DVSS | power_in | Digital supply voltage negative terminal supplying all digital parts except those via AVCC/AVSS. |
| 64 | AVCC | power_in | Positive terminal supplying SVS, brownout, oscillator, comparator_A, port 1, and LCD resistive divider circuitry; must not power up prior to DVCC. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
MSP430F415IPMR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
msp430f415ipmr-etched.step/msp430f415ipmr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430f415ipmr.step/msp430f415ipmr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (66 pp, sha256
221c0acc6935c96a, retrieved 2026-10-03, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).