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MCP6009T-E

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Microchip Tech Operational Amplifier, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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MCP6009T-E

Microchip Tech · Operational Amplifier · SOIC-14

MCP6009T-E from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUTA output Analog output of op amp A, a low-impedance voltage source.
2 VINA- input Inverting input of op amp A, a high-impedance CMOS input with low bias current.
3 VINA+ input Noninverting input of op amp A, a high-impedance CMOS input with low bias current.
4 VDD power_in Positive power supply, 1.8V to 5.5V above VSS, and it needs bypass capacitors.
5 VINB+ input Noninverting input of op amp B, a high-impedance CMOS input with low bias current.
6 VINB- input Inverting input of op amp B, a high-impedance CMOS input with low bias current.
7 VOUTB output Analog output of op amp B, a low-impedance voltage source.
8 VOUTC output Analog output of op amp C, a low-impedance voltage source.
9 VINC- input Inverting input of op amp C, a high-impedance CMOS input with low bias current.
10 VINC+ input Noninverting input of op amp C, a high-impedance CMOS input with low bias current.
11 VSS power_in Negative power supply, normally connected to ground in single-supply use.
12 VIND+ input Noninverting input of op amp D, a high-impedance CMOS input with low bias current.
13 VIND- input Inverting input of op amp D, a high-impedance CMOS input with low bias current.
14 VOUTD output Analog output of op amp D, a low-impedance voltage source.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-14
Category Operational Amplifier/Comparator
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS -1.6 1.6 mV TA=+25°C, VDD=1.8V to 5.5V, VCM=VDD/4 2
Power Supply Rejection Ratio PSRR 80 95 dB 2
Common-Mode Input Voltage Range VCMR -0.3 0.3 V VSS, 0.3 to VDD + 0.3 (min/max relative to rails), TA=+25°C 3
Common-Mode Input Voltage Range (full temp) VCMR -0.1 0.1 V VSS, 0.1 to VDD + 0.1 (relative to rails), TA=-40°C to +125°C 3
Common-Mode Rejection Ratio CMRR 60 76 dB VDD = 5.5V, VCM = -0.3V to 5.8V 3
DC Open-Loop Gain AOL 105 126 dB 0.2 < VOUT < (VDD, 0.2V) 3
High-Level Output Voltage VOH -10 -6 mV VDD = 5.5V, RL = 10 k; printed as VDD, 10 min, VDD, 6 typ 3
High-Level Output Voltage VOH -80 -54 mV VDD = 5.5V, RL = 1k; printed as VDD, 80 min, VDD, 54 typ 3
Low-Level Output Voltage VOL 6 10 mV VDD = 5.5V, RL = 10 k; printed as VSS + x 3
Low-Level Output Voltage VOL 54 80 mV VDD = 5.5V, RL = 1k; printed as VSS + x 3
Supply Voltage VDD 1.8 5.5 V 3
Quiescent Current per Amplifier IQ 50 70 µA IO = 0 3
Operating Temperature Range TA -40 125 °C Note 1 4
Storage Temperature Range TA -65 150 °C 4
Supply Voltage VDD, VSS VDD, VSS 6 V 2
Current at Analog Input Pins VIN+, VIN- -5 5 mA 2
Analog Input Voltage VIN+, VIN- -0.5 0.5 V VSS, 0.5V to VDD + 0.5V (relative to rails) 2
Storage Temperature -65 150 °C 2
Maximum Junction Temperature TJ 150 °C 2
ESD Protection HBM 3 kV All pins, HBM 2
ESD Protection CDM 2 kV All pins, CDM 2
ESD Protection MM 300 V All pins, MM 2
Thermal Resistance, 14-Lead SOIC θJA 120 °C/W 4
Input Offset Drift with Temperature ΔVOS/ΔTA 0.6 µV/°C TA= -40°C to +125°C; printed ±0.6 2
Input Bias Current IB 1 pA printed ±1 2
Input Bias Current IB 19 pA TA = +85°C 2
Input Bias Current IB 200 pA TA = +125°C 2
Input Offset Current IOS 1 pA printed ±1 2
Output Short-Circuit Current ISC 6 mA VDD = 1.8V; printed ±6 3
Output Short-Circuit Current ISC 30 mA VDD = 5.5V; printed ±30 3
Common-Mode Rejection Ratio CMRR 90 dB VDD = 5.5V, VCM = -0.3V to 4.1V 3
Start-up Time tstart 6 µs VDD = 0V to 5.5V 3
Gain Bandwidth Product GBWP 1 MHz 3
Phase Margin PM 70 ° G = +1 V/V 3
Slew Rate SR 1.9 V/µs VDD = 5.5V 3
Crosstalk 140 dB 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 29

CAD (KiCad official)

  • Symbol: MCP6009T-E
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mcp6009t-e-etched.step / mcp6009t-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp6009t-e.step / mcp6009t-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (46 pp, sha256 9926033fb0cfa1f1, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF