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Contents

README

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INA181A3IDBVR

Texas Instruments · Current-Sensing Amplifiers · SOT-23-6

INA181A3IDBVR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Analog output voltage. Amplified voltage proportional to the sensed current (V_OUT = Gain x V_SENSE + V_REF). Rail-to-rail output; A3 gain option is 100 V/V.
2 GND power_in Device ground reference (0 V).
3 IN+ input Current-sense amplifier positive input. For high-side applications, connect to the bus-voltage side of the sense resistor. For low-side applications, connect to the load side of the sense resistor. Common-mode range -0.2 V to +26 V.
4 IN- input Current-sense amplifier negative input. For high-side applications, connect to the load side of the sense resistor. For low-side applications, connect to the ground side of the sense resistor. Common-mode range -0.2 V to +26 V.
5 REF input Reference input. Sets the output voltage when the sensed differential input voltage is zero (allows bidirectional current sensing when biased between GND and VS).
6 VS power_in Power supply, 2.7 V to 5.5 V. Bypass to GND with a 0.1 uF ceramic capacitor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category Op-amp/Cmp
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • INA181A3IDBVR
  • INA181A3IDBVT
  • INA181A3IDBVRIDGSR
  • INA181A3IDBVRIDGST
  • INA181A3IDBVRIPWR
  • INA181A3IDBVRIPWT

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Common-mode rejection ratio, RTI CMRR 84 100 dB VIN+ = 0 V to 26 V, VSENSE = 0 mV, TA = –40°C to +125°C 8
Offset voltage, RTI VOS -500 100 500 μV VSENSE = 0 mV 8
Offset voltage, RTI VOS -150 25 150 μV VSENSE = 0 mV, VIN+ = 0 V 8
Offset drift, RTI dVOS/dT 0.2 1 μV/°C VSENSE = 0 mV, TA = –40°C to +125°C 8
Power-supply rejection ratio, RTI PSRR -40 8 40 μV/V VS = 2.7 V to 5.5 V, VIN+ = 12 V, VSENSE = 0 mV 8
Input offset current IIO -0.05 0.05 μA VSENSE = 0 mV 8
Gain error EG -1 0.1 1 % VOUT = 0.5 V to VS – 0.5 V, TA = –40°C to +125°C 8
Gain error vs temperature 1.5 20 ppm/°C TA = –40°C to +125°C 8
Nonlinearity error -0.01 0.01 % VOUT = 0.5 V to VS – 0.5 V 8
Maximum capacitive load 1 nF No sustained oscillation 8
Swing to VS power-supply rail (magnitude below VS) VSP 0.02 0.03 V RL = 10 kΩ to GND, TA = –40°C to +125°C; printed as (VS) – value 8
Swing to GND (magnitude above GND) VSN 0.0005 0.005 V RL = 10 kΩ to GND, TA = –40°C to +125°C; printed as (VGND) + value 8
Quiescent current (INA181) IQ 195 260 μA VSENSE = 0 mV 8
Quiescent current (INA181) IQ 300 μA VSENSE = 0 mV, TA = –40°C to +125°C 8
Common-mode input voltage (IN+ and IN–) VCM -0.2 12 26 V 7
Operating supply voltage VS 2.7 5 5.5 V 7
Operating free-air temperature TA -40 125 °C 7
Supply voltage VS 6 V 7
Differential input voltage (VIN+) – (VIN–) VIN+ – VIN– -26 26 V Differential 7
Common-mode input voltage, IN+ and IN– VIN -0.3 26 V Minimum printed as GND – 0.3 V 7
Input voltage range at REF pin VREF -0.3 0.3 V Minimum printed as GND – 0.3 V; maximum printed as VS + 0.3 V (max shown as magnitude above VS) 7
Output voltage VOUT -0.3 0.3 V Minimum printed as GND – 0.3 V; maximum printed as VS + 0.3 V (max shown as magnitude above VS) 7
Maximum output current IOUT 8 mA 7
Operating free-air temperature TA -55 150 °C 7
Junction temperature TJ 150 °C 7
Storage temperature Tstg -65 150 °C 7
Junction-to-ambient thermal resistance (DBV SOT-23) RθJA 198.7 °C/W DBV (SOT-23), 6 pins 7
Junction-to-case (top) thermal resistance (DBV SOT-23) RθJC(top) 120.9 °C/W DBV (SOT-23), 6 pins 7
Junction-to-board thermal resistance (DBV SOT-23) RθJB 52.3 °C/W DBV (SOT-23), 6 pins 7
Junction-to-top characterization parameter (DBV SOT-23) ψJT 30.3 °C/W DBV (SOT-23), 6 pins 7
Junction-to-board characterization parameter (DBV SOT-23) ψJB 52 °C/W DBV (SOT-23), 6 pins 7
Gain (A3 devices) G 100 V/V A3 devices 8

CAD (KiCad official)

  • Symbol: INA181A3IDBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: ina181a3idbvr-etched.step / ina181a3idbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ina181a3idbvr.step / ina181a3idbvr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ina181a3idbvr.step 97 KB You want the bare part, or you mark your own boards.
ina181a3idbvr-etched.step 2.1 MB You want the part with INA181A3IDBVR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 547 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (58 pp, sha256 f6bd362733887a4d, retrieved 2026-08-17, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF