IRF7241TR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	S	passive	Source terminal of the P-channel MOSFET; pins 1, 2 and 3 are internally common source connections.
2	S	passive	Source terminal of the P-channel MOSFET; pins 1, 2 and 3 are internally common source connections.
3	S	passive	Source terminal of the P-channel MOSFET; pins 1, 2 and 3 are internally common source connections.
4	G	input	Gate terminal; the absolute maximum gate-to-source voltage is ±20 V.
5	D	passive	Drain terminal; the drain-source voltage is rated -40 V with continuous drain current of -6.2 A at VGS=-10V, TA=25°C.
6	D	passive	Drain terminal; the drain-source voltage is rated -40 V with continuous drain current of -6.2 A at VGS=-10V, TA=25°C.
7	D	passive	Drain terminal; the drain-source voltage is rated -40 V with continuous drain current of -6.2 A at VGS=-10V, TA=25°C.
8	D	passive	Drain terminal; the drain-source voltage is rated -40 V with continuous drain current of -6.2 A at VGS=-10V, TA=25°C.

Key specifications

Parameter	Value
Manufacturer	UMW
Package	SOP-8
Category	Triode/MOS Tube/Transistor
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Drain-Source Voltage	VDS			-40	V		1
Continuous Drain Current	ID			-6.2	A	VGS=-10V, TA=25°C	1
Continuous Drain Current	ID			-4.9	A	VGS=-10V, TA=70°C	1
Pulsed Drain Current	IDM			-25	A	Repetitive rating; pulse width limited by max. junction temperature	1
Power Dissipation	PD			2.5	W	TA=25°C	1
Power Dissipation	PD			1.6	W	TA=70°C	1
Linear Derating Factor				20	mW/°C		1
Gate-to-Source Voltage	VGS	-20		20	V		1
Junction and Storage Temperature Range	TJ, TSTG	-55		150	°C		1
Junction-to-Drain Lead Thermal Resistance	RθJL			20	°C/W		2
Junction-to-Ambient Thermal Resistance	RθJA			50	°C/W	Surface mounted on 1 in square Cu board	2
Drain-Source Breakdown Voltage	V(BR)DSS	-40			V	ID=-250µA, VGS=0V	2
Breakdown Voltage Temp. Coefficient	ΔV(BR)DSS/TJ		0.03		V/°C	ID=-1mA, Reference to 25°C	2
Gate Threshold Voltage	VGS(th)	-1		-3	V	VDS=VGS, ID=-250μA	2
Forward Transconductance	gFS		8.9		S	VDS=-10V, ID=-6.2A	2
Gate-to-Source Forward Leakage	IGSS			100	nA	VGS=20V	2
Gate-to-Source Reverse Leakage	IGSS	-100			nA	VGS=-20V	2
Drain-to-Source Leakage Current	IDSS			-25	µA	VDS=-32V, VGS=0V	2
Static Drain-to-Source On-Resistance	RDS(ON)			41	mΩ	VGS=-10V, ID=-6.2A	2
Static Drain-to-Source On-Resistance	RDS(ON)			70	mΩ	VGS=-4.5V, ID=-5A	2

CAD (KiCad official)

Symbol: IRF7241TR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)
3D model files: irf7241tr-etched.step / irf7241tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irf7241tr.step / irf7241tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: UMW datasheet (11 pp, sha256 eca1234de16581b6, retrieved 2026-11-04, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

IRF7241TR

Verified IRF7241TR

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README