ADUM3301ARWZ-RL from Analog Devices, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD1	power_in	Supply voltage for isolator side 1, 3.0 V to 5.5 V.
2	GND1	power_in	Ground 1, the ground reference for isolator side 1.
3	VIA	input	Logic input A.
4	VIB	input	Logic input B.
5	VOC	output	Logic output C; enabled when VE1 is high or disconnected and disabled when VE1 is low.
6	NC	unconnected	No connect.
7	VE1	input	Output enable 1, active-high logic input that enables VOC when high or disconnected and disables it when low; connecting it to an external logic high or low is recommended in noisy environments.
8	GND1	power_in	Ground 1, the ground reference for isolator side 1.
9	GND2	power_in	Ground 2, the ground reference for isolator side 2.
10	VE2	input	Output enable 2, active-high logic input that enables VOA and VOB when high or disconnected and disables them when low; connecting it to an external logic high or low is recommended in noisy environments.
11	NC	unconnected	No connect.
12	VIC	input	Logic input C.
13	VOB	output	Logic output B.
14	VOA	output	Logic output A.
15	GND2	power_in	Ground 2, the ground reference for isolator side 2.
16	VDD2	power_in	Supply voltage for isolator side 2, 3.0 V to 5.5 V.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SOIC-16
Category
Pins	16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input Supply Current per Channel, Quiescent (5 V operation)	IDDI (Q)		0.66	0.97	mA		4
Output Supply Current per Channel, Quiescent (5 V operation)	IDDO (Q)		0.39	0.55	mA		4
ADuM3301 Total VDD1 Supply Current, DC to 2 Mbps (5 V operation)	IDD1 (Q)		2	3.1	mA	DC to 1 MHz logic signal freq.	4
ADuM3301 Total VDD2 Supply Current, DC to 2 Mbps (5 V operation)	IDD2 (Q)		1.6	2.3	mA	DC to 1 MHz logic signal freq.	4
Input Currents (all models)	IIA, IIB, IIC, IID, IE1, IE2	-10	0.01	10	µA	0 V ≤ VIA, VIB, VIC, VID ≤ VDD1 or VDD2, 0 V ≤ VE1, VE2 ≤ VDD1 or VDD2	4
Logic High Input Threshold (5 V operation)	VIH, VEH	2			V		4
Logic Low Input Threshold (5 V operation)	VIL, VEL			0.8	V		4
Logic High Output Voltage (5 V operation)	VOAH, VOBH, VOCH, VODH			5	V	IOx = −20 µA, VIx = VIxH	4
Logic High Output Voltage (5 V operation)	VOAH, VOBH, VOCH, VODH			4.8	V	IOx = −3.2 mA, VIx = VIxH	4
Logic Low Output Voltage (5 V operation)	VOAL, VOBL, VOCL, VODL		0	0.1	V	IOx = 20 µA, VIx = VIxL	4
Logic Low Output Voltage (5 V operation)	VOAL, VOBL, VOCL, VODL		0.04	0.1	V	IOx = 400 µA, VIx = VIxL	4
Logic Low Output Voltage (5 V operation)	VOAL, VOBL, VOCL, VODL		0.2	0.4	V	IOx = 3.2 mA, VIx = VIxL	4
Minimum Pulse Width, ADuM3301ARWZ (5 V operation)	PW	1000			ns	CL = 15 pF, CMOS signal levels	4
Maximum Data Rate, ADuM3301ARWZ (5 V operation)				1	Mbps	CL = 15 pF, CMOS signal levels	4
Propagation Delay, ADuM3301ARWZ (5 V operation)	tPHL, tPLH	50	65	100	ns	CL = 15 pF, CMOS signal levels	4
Pulse Width Distortion, ADuM3301ARWZ (5 V operation)	PWD			40	ns	CL = 15 pF, CMOS signal levels	4
Propagation Delay Skew, ADuM3301ARWZ (5 V operation)	tPSK			50	ns	CL = 15 pF, CMOS signal levels	4
Channel-to-Channel Matching, ADuM3301ARWZ (5 V operation)	tPSKCD/OD			50	ns	CL = 15 pF, CMOS signal levels	4
Output Disable Propagation Delay (5 V operation)	tPHZ, tPLH		6	8	ns	CL = 15 pF, CMOS signal levels	5
Output Enable Propagation Delay (5 V operation)	tPZH, tPZL		6	8	ns	CL = 15 pF, CMOS signal levels	5
Output Rise/Fall Time 10% to 90% (5 V operation)	tR/tF			2.5	ns	CL = 15 pF, CMOS signal levels	5
Common-Mode Transient Immunity at Logic High Output (5 V operation)	/CMH/	25	35		kV/µs	VIx = VDD1 or VDD2, VCM = 1000 V, transient magnitude = 800 V	5
Common-Mode Transient Immunity at Logic Low Output (5 V operation)	/CML/	25	35		kV/µs	VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V	5
Input Supply Current per Channel, Quiescent (3.3 V operation)	IDDI (Q)		0.37	0.57	mA		6
Output Supply Current per Channel, Quiescent (3.3 V operation)	IDDO (Q)		0.25	0.37	mA		6
ADuM3301 Total VDD1 Supply Current, DC to 2 Mbps (3.3 V operation)	IDD1 (Q)		1.1	1.6	mA	DC to 1 MHz logic signal freq.	6
ADuM3301 Total VDD2 Supply Current, DC to 2 Mbps (3.3 V operation)	IDD2 (Q)		0.9	1.4	mA	DC to 1 MHz logic signal freq.	6
Input Currents (all models, 3.3 V table)	IIA, IIB, IIC, IID, IE1, IE2	-10	0.01	10	µA	0 V ≤ VIA, VIB, VIC, VID ≤ VDD1 or VDD2, 0 V ≤ VE1, VE2 ≤ VDD1 or VDD2	6
Logic High Input Threshold (3.3 V operation)	VIH, VEH	1.6			V		6
Logic Low Input Threshold (3.3 V operation)	VIL, VEL			0.4	V		6
Logic High Output Voltage (3.3 V operation)	VOAH, VOBH, VOCH, VODH			3	V	IOx = −20 µA, VIx = VIxH	6
Logic High Output Voltage (3.3 V operation)	VOAH, VOBH, VOCH, VODH			2.8	V	IOx = −3.2 mA, VIx = VIxH	6
Logic Low Output Voltage (3.3 V operation)	VOAL, VOBL, VOCL, VODL		0	0.1	V	IOx = 20 µA, VIx = VIxL	6
Logic Low Output Voltage (3.3 V operation)	VOAL, VOBL, VOCL, VODL		0.04	0.1	V	IOx = 400 µA, VIx = VIxL	6
Logic Low Output Voltage (3.3 V operation)	VOAL, VOBL, VOCL, VODL		0.2	0.4	V	IOx = 3.2 mA, VIx = VIxL	6
Minimum Pulse Width, ADuM3301ARWZ (3.3 V operation)	PW	1000			ns	CL = 15 pF, CMOS signal levels	6
Maximum Data Rate, ADuM3301ARWZ (3.3 V operation)				1	Mbps	CL = 15 pF, CMOS signal levels	6
Propagation Delay, ADuM3301ARWZ (3.3 V operation)	tPHL, tPLH	50	75	100	ns	CL = 15 pF, CMOS signal levels	7
Pulse Width Distortion, ADuM3301ARWZ (3.3 V operation)	PWD			40	ns	CL = 15 pF, CMOS signal levels	7
Propagation Delay Skew, ADuM3301ARWZ (3.3 V operation)	tPSK			50	ns	CL = 15 pF, CMOS signal levels	7
Channel-to-Channel Matching, ADuM3301ARWZ (3.3 V operation)	tPSKCD/OD			50	ns	CL = 15 pF, CMOS signal levels	7
Output Disable Propagation Delay (3.3 V operation)	tPHZ, tPLH		6	8	ns	CL = 15 pF, CMOS signal levels	7
Output Enable Propagation Delay (3.3 V operation)	tPZH, tPZL		6	8	ns	CL = 15 pF, CMOS signal levels	7
Output Rise/Fall Time 10% to 90% (3.3 V operation)	tR/tF			3	ns	CL = 15 pF, CMOS signal levels	7
Common-Mode Transient Immunity at Logic High Output (3.3 V operation)	/CMH/	25	35		kV/µs	VIx = VDD1 or VDD2, VCM = 1000 V, transient magnitude = 800 V	7
Common-Mode Transient Immunity at Logic Low Output (3.3 V operation)	/CML/	25	35		kV/µs	VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V	7
Operating Temperature	TA	-40		105	°C		13
Supply Voltages	VDD1, VDD2	3		5.5	V		13
Input Signal Rise and Fall Times				1	ms		13
Storage Temperature	TST	-65		150	°C		14
Ambient Operating Temperature	TA	-40		105	°C		14
Supply Voltages	VDD1, VDD2	-0.5		7	V		14
Input Voltage	VIA, VIB, VIC, VID, VE1, VE2	-0.5			V		14
Output Voltage	VOA, VOB, VOC, VOD	-0.5			V		14
Average Output Current per Pin, Side 1	IO1	-23		23	mA		14
Average Output Current per Pin, Side 2	IO2	-30		30	mA		14
Common-Mode Transients	CMH, CML	-100		100	kV/µs		14
IC Junction-to-Case Thermal Resistance, Side 2 (underside)	θJCO		28		°C/W		4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
housing	pC		In accordance with DIN EN IEC 60747-17 (VDE 0884-17), the ADuM3300/ADuM3301 are proof tested by applying an insulation test voltage ≥1050 V peak for 1 second (partial discharge detection limit = 5 pC)	11

CAD (KiCad official)

Symbol: ADUM3301ARWZ-RL
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)
3D model files: adum3301arwz-rl-etched.step / adum3301arwz-rl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum3301arwz-rl.step / adum3301arwz-rl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (22 pp, sha256 62858dc46693bfef, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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ADUM3301ARWZ-RL

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