component
SN74HC112N
Public Made by Adomby adom
XBLW Flip Flops, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74HC112N
XBLW · Flip Flops · DIP-16
SN74HC112N from XBLW, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CP | input | Clock input for flip-flop 1, edge-triggered on the HIGH-to-LOW transition. |
| 2 | 1K | input | Data input K for flip-flop 1. |
| 3 | 1J | input | Data input J for flip-flop 1. |
| 4 | 1S | input | Set input for flip-flop 1, active LOW. |
| 5 | 1Q | output | True flip-flop output of flip-flop 1. |
| 6 | 1Q | output | Complement flip-flop output of flip-flop 1. |
| 7 | 2Q | output | Complement flip-flop output of flip-flop 2. |
| 8 | GND | power_in | Ground (0 V) reference for the device. |
| 9 | 2Q | output | True flip-flop output of flip-flop 2. |
| 10 | 2S | input | Set input for flip-flop 2, active LOW. |
| 11 | 2J | input | Data input J for flip-flop 2. |
| 12 | 2K | input | Data input K for flip-flop 2. |
| 13 | 2CP | input | Clock input for flip-flop 2, edge-triggered on the HIGH-to-LOW transition. |
| 14 | 2R | input | Reset input for flip-flop 2, active LOW. |
| 15 | 1R | input | Reset input for flip-flop 1, active LOW. |
| 16 | VCC | power_in | Supply voltage; the SN74HC112 operates from 2 V to 6 V per the datasheet features list. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XBLW |
| Package | DIP-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 7 | V | Tamb=25℃; voltages referenced to Vss | 3 | |
| ground current | IGND | -50 | mA | Tamb=25℃ | 3 | ||
| input clamping current | IIK | -20 | 20 | mA | VI < -0.5V or VI > VCC+0.5V | 3 | |
| output clamping current | IOK | -20 | 20 | mA | VO < -0.5V or VO > VCC+0.5V | 3 | |
| output current | IO | -25 | 25 | mA | -0.5V < VO < VCC+0.5V | 3 | |
| storage temperature | Tstg | -65 | 150 | ℃ | 3 | ||
| soldering temperature (DIP) | TL | 245 | ℃ | 10s, DIP package | 3 | ||
| HIGH-level input voltage | VIH | 1.5 | 1.2 | V | Tamb=-40℃ to +85℃; VCC=2.0V | 3 | |
| HIGH-level input voltage | VIH | 3.15 | 2.4 | V | Tamb=-40℃ to +85℃; VCC=4.5V | 3 | |
| HIGH-level input voltage | VIH | 4.2 | 3.2 | V | Tamb=-40℃ to +85℃; VCC=6.0V | 3 | |
| LOW-level input voltage | VIL | 0.8 | 0.5 | V | Tamb=-40℃ to +85℃; VCC=2.0V | 3 | |
| LOW-level input voltage | VIL | 2.1 | 1.35 | V | Tamb=-40℃ to +85℃; VCC=4.5V | 3 | |
| LOW-level input voltage | VIL | 2.8 | 1.8 | V | Tamb=-40℃ to +85℃; VCC=6.0V | 3 | |
| HIGH-level output voltage | VOH | 1.9 | 2 | V | Tamb=-40℃ to +85℃; VCC=2.0V; IO=-20uA | 3 | |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | Tamb=-40℃ to +85℃; VCC=4.5V; IO=-20uA | 3 | |
| HIGH-level output voltage | VOH | 5.9 | 6 | V | Tamb=-40℃ to +85℃; VCC=6.0V; IO=-20uA | 3 | |
| HIGH-level output voltage | VOH | 3.84 | 4.32 | V | Tamb=-40℃ to +85℃; VCC=4.5V; IO=-4.0mA | 3 | |
| HIGH-level output voltage | VOH | 5.34 | 5.81 | V | Tamb=-40℃ to +85℃; VCC=6.0V; IO=-5.2mA | 3 | |
| LOW-level output voltage | VOL | 0 | 0.1 | V | Tamb=-40℃ to +85℃; VCC=2.0V; IO=20uA | 3 | |
| LOW-level output voltage | VOL | 0.15 | 0.33 | V | Tamb=-40℃ to +85℃; VCC=4.5V; IO=4.0mA | 3 | |
| LOW-level output voltage | VOL | 0.16 | 0.33 | V | Tamb=-40℃ to +85℃; VCC=6.0V; IO=5.2mA | 3 | |
| input leakage current | II | -1 | 1 | uA | Tamb=-40℃ to +85℃; VCC=6.0V; VI=VCC or GND | 3 | |
| supply current | ICC | 80 | uA | Tamb=-40℃ to +85℃; VCC=6.0V; VI=VCC or GND; IO=0A | 3 | ||
| HIGH-level input voltage | VIH | 1.5 | V | Tamb=-40℃ to +125℃; VCC=2.0V | 4 | ||
| HIGH-level input voltage | VIH | 3.15 | V | Tamb=-40℃ to +125℃; VCC=4.5V | 4 | ||
| HIGH-level input voltage | VIH | 4.2 | V | Tamb=-40℃ to +125℃; VCC=6.0V | 4 | ||
| LOW-level input voltage | VIL | 0.5 | V | Tamb=-40℃ to +125℃; VCC=2.0V | 4 | ||
| LOW-level input voltage | VIL | 1.35 | V | Tamb=-40℃ to +125℃; VCC=4.5V | 4 | ||
| LOW-level input voltage | VIL | 1.8 | V | Tamb=-40℃ to +125℃; VCC=6.0V | 4 | ||
| HIGH-level output voltage | VOH | 1.9 | V | Tamb=-40℃ to +125℃; VCC=2.0V; IO=-20uA | 4 | ||
| HIGH-level output voltage | VOH | 4.4 | V | Tamb=-40℃ to +125℃; VCC=4.5V; IO=-20uA | 4 | ||
| HIGH-level output voltage | VOH | 5.9 | V | Tamb=-40℃ to +125℃; VCC=6.0V; IO=-20uA | 4 | ||
| HIGH-level output voltage | VOH | 3.7 | V | Tamb=-40℃ to +125℃; VCC=4.5V; IO=-4.0mA | 4 | ||
| HIGH-level output voltage | VOH | 5.2 | V | Tamb=-40℃ to +125℃; VCC=6.0V; IO=-5.2mA | 4 | ||
| LOW-level output voltage | VOL | 0.1 | V | Tamb=-40℃ to +125℃; VCC=2.0V; IO=20uA | 4 | ||
| LOW-level output voltage | VOL | 0.4 | V | Tamb=-40℃ to +125℃; VCC=4.5V; IO=4.0mA | 4 | ||
| input leakage current | II | -1 | 1 | uA | Tamb=-40℃ to +125℃; VCC=6.0V; VI=VCC or GND | 4 | |
| supply current | ICC | 160 | uA | Tamb=-40℃ to +125℃; VCC=6.0V; VI=VCC or GND; IO=0A | 4 | ||
| nCP to nQ propagation delay | tPLH, tPHL | 55 | 220 | ns | Tamb=-40℃ to +85℃; VCC=2.0V; CL=50pF; see Figure 5 | 5 | |
| nCP to nQ propagation delay | tPLH, tPHL | 20 | 44 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 5 | 5 | |
| nCP to nQ propagation delay | tPLH, tPHL | 16 | 37 | ns | Tamb=-40℃ to +85℃; VCC=6.0V; CL=50pF; see Figure 5 | 5 | |
| nS to nQ propagation delay | tPLH, tPHL | 18 | 39 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 6 | 5 | |
| transition time | tTHL, tTLH | 7 | 19 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 5 | 5 | |
| nCP HIGH or LOW pulse width | tw | 20 | 8 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 5 | 5 | |
| nJ and nK to nCP set-up time | tsu | 20 | 7 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 5 | 5 | |
| nJ and nK to nCP hold time | th | 0 | -4 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 5 | 5 | |
| maximum frequency | fmax | 24 | 60 | MHz | Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 5 | 5 | |
| maximum frequency | fmax | 28 | 71 | MHz | Tamb=-40℃ to +85℃; VCC=6.0V; CL=50pF; see Figure 5 | 6 | |
| nCP to nQ propagation delay | tPLH, tPHL | 265 | ns | Tamb=-40℃ to +125℃; VCC=2.0V; CL=50pF; see Figure 3 | 6 | ||
| nCP to nQ propagation delay | tPLH, tPHL | 53 | ns | Tamb=-40℃ to +125℃; VCC=4.5V; CL=50pF; see Figure 3 | 6 | ||
| nCP to nQ propagation delay | tPLH, tPHL | 45 | ns | Tamb=-40℃ to +125℃; VCC=6.0V; CL=50pF; see Figure 3 | 6 | ||
| nJ and nK to nCP set-up time | tsu | 120 | ns | Tamb=-40℃ to +125℃; VCC=2.0V; CL=50pF; see Figure 3 | 7 | ||
| nJ and nK to nCP set-up time | tsu | 24 | ns | Tamb=-40℃ to +125℃; VCC=4.5V; CL=50pF; see Figure 3 | 7 | ||
| maximum frequency | fmax | 20 | MHZ | Tamb=-40℃ to +125℃; VCC=4.5V; CL=50pF; see Figure 3 | 7 | ||
| maximum frequency | fmax | 24 | NHZ | Tamb=-40℃ to +125℃; VCC=6.0V; CL=50pF; see Figure 3 | 7 |
CAD (KiCad official)
- Symbol:
SN74HC112N - Footprint:
Package_DIP:DIP-16_W7.62mm - 3D model: DIP-16 (KiCad packages3D, STEP)
- 3D model files:
sn74hc112n-etched.step/sn74hc112n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc112n.step/sn74hc112n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XBLW datasheet (14 pp, sha256
566b4af3aceaa0c1, retrieved 2026-10-15, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).