component
BL78L18
Public Made by Adomby adom
GME(银河微电) Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownBL78L18
GME(银河微电) · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89
BL78L18 from GME(银河微电), in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VO | power_out | Regulated 18V output (Vo 17.3V to 18.7V at Tj=25°C), with a 0.1µF output capacitor shown in the application circuit. |
| 2 | GND | power_in | Ground reference for the regulator, common to input and output capacitors. |
| 3 | VI | power_in | Unregulated input voltage, maximum 40V for the 78L18, with a 0.33µF input capacitor shown in the application circuit. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GME(银河微电) |
| Package | SOT-89 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage (Tj=25℃ row) | VO | 17.3 | 18 | 18.7 | V | Tj=25℃ | 7 |
| Output voltage (Vi range, IO 1-40mA) | VO | 17.1 | 18.9 | V | Vi=20.7V-33V, IO=1mA-40mA | 7 | |
| Output voltage (Vi=27V, IO 1-70mA) | VO | 17.1 | 18.9 | V | Vi=27V, IO=1mA-70mA | 7 | |
| Load regulation (IO 1-100mA) | Regload | 30 | 170 | mV | Tj=25℃, IO=1mA-100mA | 7 | |
| Load regulation (IO 1-40mA) | Regload | 15 | 85 | mV | Tj=25℃, IO=1mA-40mA | 7 | |
| Line regulation (Vi 20.7-33V) | Regline | 45 | 325 | mV | 20.7V≤Vi≤33V, Tj=25℃ | 7 | |
| Line regulation (Vi 21-33V) | Regline | 35 | 275 | mV | 21V≤Vi≤33V, Tj=25℃ | 7 | |
| Input bias current (Tj=25℃) | IIB | 3.1 | 6.5 | mA | Tj=25℃ | 7 | |
| Input bias current (Tj=125℃) | IIB | 6 | mA | Tj=125℃ | 7 | ||
| Input bias current change (line) | ΔIIB | 1.5 | mA | 21V≤Vi≤33V | 7 | ||
| Input bias current change (load) | ΔIIB | 0.1 | mA | 1mA≤IO≤40mA | 7 | ||
| Ripple rejection | RR | 33 | 48 | dB | IO=40mA,23V≤Vi≤33V,f=120Hz,Tj=25℃ | 7 | |
| Output noise voltage | VN | 150 | μV | 10Hz≤f≤100KHz,TA=25℃ | 7 | ||
| Dropout voltage | VI-VO | 1.7 | V | Tj=25℃ | 7 | ||
| Input voltage (78L18-78L24 variant) | VI | 40 | V | 78L18-78L24 variant | 1 | ||
| Maximum output current | ICM | 100 | mA | 1 | |||
| Power dissipation | PD | 500 | mW | TA = 25C | 1 | ||
| Operating temperature range | TOPR | -40 | 125 | C | 1 | ||
| Junction temperature | TJ | 150 | C | 1 | |||
| Storage temperature range | TSTG | -65 | 150 | C | 1 | ||
| Thermal resistance junction-to-air | RθJA | 250 | °C/W | 1 |
CAD (KiCad official)
- Symbol:
BL78L18 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files:
bl78l18-etched.step/bl78l18-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bl78l18.step/bl78l18.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GME(银河微电) datasheet (9 pp, sha256
a5d9bd6ac6d442fe, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).