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STM8S103F3P3TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM8S103F3P3TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
STM8S103F3P3TR from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PD4/BEEP/TIM2_CH1/UART1_CK | bidirectional | I/O port pin with high-sink output capability; alternate functions include Timer 2 channel 1, BEEP output, or UART1 clock. |
| 2 | PD5/AIN5/UART1_TX | bidirectional | I/O port pin with high-sink output capability; alternate functions include analog input AIN5 or UART1 transmit data. |
| 3 | PD6/AIN6/UART1_RX | bidirectional | I/O port pin with high-sink output capability; alternate functions include analog input AIN6 or UART1 receive data. |
| 4 | NRST | bidirectional | Active-low reset input with internal weak pull-up resistor (30-80 kΩ) and open-drain output capability for device and external circuit reset control. |
| 5 | PA1/OSCIN | bidirectional | General-purpose I/O port pin with oscillator crystal input capability; cannot be used for waking from Halt or Active-halt modes. |
| 6 | PA2/OSCOUT | bidirectional | General-purpose I/O port pin with oscillator crystal output capability. |
| 7 | VSS | power_in | Digital ground power supply connection pin; all VSS pins must be connected to external power supply. |
| 8 | VCAP | passive | External regulator capacitor connection pin; requires 470-3300 nF capacitor with ESR ≤ 0.3 Ω and ESL ≤ 15 nH at 1 MHz. |
| 9 | VDD | power_in | Digital power supply pin with operating voltage range 2.95 to 5.5 V; all VDD pins must be connected to external power supply. |
| 10 | PA3/TIM2_CH3 [SPI_NSS] | bidirectional | I/O port pin with high-sink output capability; Timer 2 channel 3 by default; remappable to SPI master/slave select via AFR1 option bit. |
| 11 | PB5/I2C_SDA [TIM1_BKIN] | bidirectional | True open-drain I/O port pin without P-buffer or protection diode; I2C SDA by default; remappable to Timer 1 break input via AFR4 option bit. |
| 12 | PB4/I2C_SCL | bidirectional | True open-drain I/O port pin without P-buffer or protection diode; I2C SCL by default; remappable to ADC external trigger via AFR4 option bit. |
| 13 | PC3/TIM1_CH3 [TLI] [TIM1_CH1N] | bidirectional | I/O port pin with high-sink output capability; Timer 1 channel 3 by default; remappable to top-level interrupt (AFR3) or Timer 1 inverted channel 1 (AFR7). |
| 14 | PC4/CLK_CCO/TIM1_CH4/AIN2 [TIM1_CH2N] | bidirectional | I/O port pin with high-sink output capability; supports configurable clock output, Timer 1 channel 4, and analog input AIN2; remappable to Timer 1 inverted channel 2 via AFR7. |
| 15 | PC5/SPI_SCK [TIM2_CH1] | bidirectional | I/O port pin with high-sink output capability; SPI clock by default; remappable to Timer 2 channel 1 via AFR0 option bit. |
| 16 | PC6/SPI_MOSI [TIM1_CH1] | bidirectional | I/O port pin with high-sink output capability; SPI master-out/slave-in by default; remappable to Timer 1 channel 1 via AFR0 option bit. |
| 17 | PC7/SPI_MISO [TIM1_CH2] | bidirectional | I/O port pin with high-sink output capability; SPI master-in/slave-out by default; remappable to Timer 1 channel 2 via AFR0 option bit. |
| 18 | PD1/SWIM | bidirectional | I/O port pin with high-sink output capability; dedicated to SWIM single-wire debug interface and configurable as general-purpose I/O. |
| 19 | PD2/AIN3 [TIM2_CH3] | bidirectional | I/O port pin with high-sink output capability; analog input AIN3 by default; remappable to Timer 2 channel 3 via AFR1 option bit. |
| 20 | PD3/AIN4/TIM2_CH2/ADC_ETR | bidirectional | I/O port pin with high-sink output capability; supports analog input AIN4, Timer 2 channel 2, and ADC external trigger functions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
STM8S103F3P3TR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
stm8s103f3p3tr-etched.step/stm8s103f3p3tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm8s103f3p3tr.step/stm8s103f3p3tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (121 pp, sha256
ac23789ac0a2f408, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).