component
74HC366PW-Q100
Public Made by Adomby adom
Nexperia Buffers, Drivers, Receivers, Transceivers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74HC366PW-Q100
Nexperia · Buffers, Drivers, Receivers, Transceivers · TSSOP-16
74HC366PW-Q100 from Nexperia, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Output enable input 1, active LOW; outputs are enabled only when OE1 and OE2 are both LOW, and a HIGH on either input puts the outputs in the high-impedance OFF-state. |
| 2 | 1A | input | Data input for buffer 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 3 | 1Y | tri_state | Inverting 3-state data output of buffer 1; high-impedance when the outputs are disabled by OE1 or OE2. |
| 4 | 2A | input | Data input for buffer 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 5 | 2Y | tri_state | Inverting 3-state data output of buffer 2; high-impedance when the outputs are disabled by OE1 or OE2. |
| 6 | 3A | input | Data input for buffer 3; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 7 | 3Y | tri_state | Inverting 3-state data output of buffer 3; high-impedance when the outputs are disabled by OE1 or OE2. |
| 8 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 9 | 4Y | tri_state | Inverting 3-state data output of buffer 4; high-impedance when the outputs are disabled by OE1 or OE2. |
| 10 | 4A | input | Data input for buffer 4; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 11 | 5Y | tri_state | Inverting 3-state data output of buffer 5; high-impedance when the outputs are disabled by OE1 or OE2. |
| 12 | 5A | input | Data input for buffer 5; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 13 | 6Y | tri_state | Inverting 3-state data output of buffer 6; high-impedance when the outputs are disabled by OE1 or OE2. |
| 14 | 6A | input | Data input for buffer 6; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 15 | OE2 | input | Output enable input 2, active LOW; outputs are enabled only when OE1 and OE2 are both LOW, and a HIGH on either input puts the outputs in the high-impedance OFF-state. |
| 16 | VCC | power_in | Supply voltage: recommended 2.0 V to 6.0 V for 74HC366-Q100 and 4.5 V to 5.5 V for 74HCT366-Q100, with an absolute maximum of 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input clamping current | IIK | -20 | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 4 | |
| Output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 | |
| Output current | IO | -35 | 35 | mA | VO = -0.5 V to (VCC + 0.5 V) | 4 | |
| Supply current | ICC | 70 | mA | 4 | |||
| Ground current | IGND | -70 | mA | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Total power dissipation | Ptot | 500 | mW | SOT403-1 (TSSOP16) derates linearly with 8.5 mW/K above 91 °C | 4 | ||
| Supply voltage | VCC | 2 | 5 | 6 | V | 74HC366-Q100 columns | 4 |
| Input voltage | VI | 0 | V | 4 | |||
| Output voltage | VO | 0 | V | 4 | |||
| Ambient temperature | Tamb | -40 | 25 | 125 | °C | 4 | |
| Input transition rise and fall rate | Δt/ΔV | 625 | ns/V | VCC = 2.0 V | 4 | ||
| Input transition rise and fall rate | Δt/ΔV | 1.67 | 139 | ns/V | VCC = 4.5 V | 4 | |
| Input transition rise and fall rate | Δt/ΔV | 83 | ns/V | VCC = 6.0 V | 4 | ||
| HIGH-level input voltage | VIH | 1.5 | V | VCC = 2.0 V; Tamb = -40 °C to +125 °C | 6 | ||
| HIGH-level input voltage | VIH | 3.15 | V | VCC = 4.5 V; Tamb = -40 °C to +125 °C | 6 | ||
| HIGH-level input voltage | VIH | 4.2 | V | VCC = 6.0 V; Tamb = -40 °C to +125 °C | 6 | ||
| LOW-level input voltage | VIL | 0.5 | V | VCC = 2.0 V; Tamb = -40 °C to +125 °C | 6 | ||
| LOW-level input voltage | VIL | 1.35 | V | VCC = 4.5 V; Tamb = -40 °C to +125 °C | 6 | ||
| LOW-level input voltage | VIL | 1.8 | V | VCC = 6.0 V; Tamb = -40 °C to +125 °C | 6 | ||
| HIGH-level output voltage | VOH | 1.9 | V | VI = VIH or VIL; IO = -20 μA; VCC = 2.0 V; Tamb = -40 °C to +125 °C | 6 | ||
| HIGH-level output voltage | VOH | 4.4 | V | VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 6 | ||
| HIGH-level output voltage | VOH | 5.9 | V | VI = VIH or VIL; IO = -20 μA; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 6 | ||
| HIGH-level output voltage | VOH | 3.7 | V | VI = VIH or VIL; IO = -6.0 mA; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 6 | ||
| HIGH-level output voltage | VOH | 5.2 | V | VI = VIH or VIL; IO = -7.8 mA; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 6 | ||
| LOW-level output voltage | VOL | 0.1 | V | VI = VIH or VIL; IO = 20 μA; VCC = 2.0 V; Tamb = -40 °C to +125 °C | 6 | ||
| LOW-level output voltage | VOL | 0.4 | V | VI = VIH or VIL; IO = 6.0 mA; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 6 | ||
| Input leakage current | II | -1 | 1 | μA | VI = VCC or GND; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 6 | |
| OFF-state output current | IOZ | -10 | 10 | μA | VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 6 | |
| Supply current | ICC | 160 | μA | VI = VCC or GND; IO = 0 A; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 6 | ||
| Propagation delay nA to nY | tpd | 150 | ns | CL = 50 pF; nA to nY; see Fig. 6; VCC = 2.0 V; Tamb = -40 °C to +125 °C | 9 | ||
| Propagation delay nA to nY | tpd | 30 | ns | CL = 50 pF; nA to nY; see Fig. 6; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 9 | ||
| Propagation delay nA to nY | tpd | 26 | ns | CL = 50 pF; nA to nY; see Fig. 6; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 9 | ||
| Enable time OEn to nY | ten | 225 | ns | CL = 50 pF; OEn to nY; see Fig. 7; VCC = 2.0 V; Tamb = -40 °C to +125 °C | 9 | ||
| Enable time OEn to nY | ten | 45 | ns | CL = 50 pF; OEn to nY; see Fig. 7; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 9 | ||
| Enable time OEn to nY | ten | 38 | ns | CL = 50 pF; OEn to nY; see Fig. 7; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 9 | ||
| Disable time OEn to nY | tdis | 225 | ns | CL = 50 pF; OEn to nY; see Fig. 7; VCC = 2.0 V; Tamb = -40 °C to +125 °C | 9 | ||
| Disable time OEn to nY | tdis | 45 | ns | CL = 50 pF; OEn to nY; see Fig. 7; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 9 | ||
| Disable time OEn to nY | tdis | 38 | ns | CL = 50 pF; OEn to nY; see Fig. 7; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 9 | ||
| Transition time | tt | 90 | ns | CL = 50 pF; see Fig. 6; VCC = 2.0 V; Tamb = -40 °C to +125 °C | 9 | ||
| Transition time | tt | 18 | ns | CL = 50 pF; see Fig. 6; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 9 | ||
| Transition time | tt | 15 | ns | CL = 50 pF; see Fig. 6; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 9 |
CAD (KiCad official)
- Symbol:
74HC366PW-Q100 - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
74hc366pw-q100-etched.step/74hc366pw-q100-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc366pw-q100.step/74hc366pw-q100.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (17 pp, sha256
8476010897d4422c, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).