component
UC3845D8TR
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUC3845D8TR
Texas Instruments · AC-DC Controllers And Regulators · SOIC-8
UC3845D8TR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Error amplifier output and compensation pin; the open-collector error amplifier has internal current limiting, so COMP can be forced to GROUND to obtain zero duty cycle. |
| 2 | VFB | input | Inverting input of the internal error amplifier used for voltage feedback loop control; keep the VFB trace as short as possible with minimal stray capacitance for stability. |
| 3 | ISENSE | input | Primary-side current sense input to the PWM comparator that terminates OUTPUT conduction; the typical ISENSE voltage is 1 V, with a maximum input voltage of 1 V. |
| 4 | RT/CT | bidirectional | Oscillator timing pin: RT connects from VREF and CT to GROUND to set the switching frequency via fOSC = 1.72/(RT x CT), and RT must never be smaller than 5 kΩ. |
| 5 | GROUND | power_in | Combined signal (analog) and power ground for this 8-pin package, which has no separate PWRGND pin; keep the timing capacitor and bypass returns on a single point ground. |
| 6 | OUTPUT | output | Totem-pole gate driver output that drives the external MOSFET directly, sourcing and sinking peak current up to 1 A, and held low when VCC is below the turn-on threshold. |
| 7 | VCC | power_in | Power supply input for the controller, with recommended supply voltage 12 V to 28 V, absolute maximum 30 V from a low-impedance source, and a bypass capacitor of typically 0.1 µF to GROUND placed close to the pin. |
| 8 | VREF | power_out | 5 V reference output that must be bypassed to GROUND with a ceramic capacitor of at least 0.1 µF placed close to the pin, and external loads on VREF require additional bypassing. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
UC3845D8TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
uc3845d8tr-etched.step/uc3845d8tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);uc3845d8tr.step/uc3845d8tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (61 pp, sha256
0f875fd24cbb5fda, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).