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MX25L25673GM2I-08G
Public Made by Adomby adom
MXIC Macronix NOR FLASH, SOP-8-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMX25L25673GM2I-08G
MXIC Macronix · NOR FLASH · SOP-8-208mil
MX25L25673GM2I-08G from MXIC Macronix, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS# | input | Chip select input; serial access to the device is enabled by the CS# input. |
| 2 | SO/SIO1 | bidirectional | Serial data output for 1 x I/O; becomes serial data input and output (SIO1) in 2 x I/O or 4 x I/O read mode. |
| 3 | SIO2 | bidirectional | Serial data input and output used in 4 x I/O read mode. |
| 4 | GND | power_in | Ground. |
| 5 | SI/SIO0 | bidirectional | Serial data input for 1 x I/O; becomes serial data input and output (SIO0) in 2 x I/O or 4 x I/O read mode. |
| 6 | SCLK | input | Clock input. |
| 7 | SIO3 | bidirectional | Serial data input and output used in 4 x I/O read mode. |
| 8 | VCC | power_in | +3V power supply pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MXIC Macronix |
| Package | SOP-8-208mil |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient Operating Temperature | -40 | 85 | °C | Industrial grade | 89 | ||
| Storage Temperature | -65 | 150 | °C | 89 | |||
| Applied Input Voltage | -0.5 | V | Printed max is VCC+0.5V | 89 | |||
| Applied Output Voltage | -0.5 | V | Printed max is VCC+0.5V | 89 | |||
| VCC to Ground Potential | -0.5 | 4 | V | 89 | |||
| Single Power Supply Operation (read, erase, program) | VCC | 2.7 | 3.6 | V | Single power supply operation | 4 | |
| Input Capacitance | CIN | 8 | pF | VIN = 0V | 89 | ||
| Output Capacitance | COUT | 10 | pF | VOUT = 0V | 89 | ||
| Input Load Current | ILI | -2 | 2 | uA | VCC = VCC Max, VIN = VCC or GND | 91 | |
| Output Leakage Current | ILO | -2 | 2 | uA | VCC = VCC Max, VOUT = VCC or GND | 91 | |
| VCC Standby Current | ISB1 | 15 | 100 | uA | VIN = VCC or GND, CS# = VCC | 91 | |
| Deep Power-down Current | ISB2 | 20 | uA | VIN = VCC or GND, CS# = VCC | 91 | ||
| VCC Read (4 x I/O read) | ICC1 | 16 | 30 | mA | f=133MHz, SCLK=0.1VCC/0.9VCC, SO=Open | 91 | |
| VCC Read (4 x I/O read) | ICC1 | 12 | 25 | mA | f=104MHz, SCLK=0.1VCC/0.9VCC, SO=Open | 91 | |
| VCC Read (4 x I/O read) | ICC1 | 12 | 20 | mA | f=84MHz, SCLK=0.1VCC/0.9VCC, SO=Open | 91 | |
| VCC Program Current (PP) | ICC2 | 12 | 20 | mA | Program in Progress, CS# = VCC | 91 | |
| VCC Write Status Register (WRSR) Current | ICC3 | 12 | mA | Program status register in progress, CS#=VCC | 91 | ||
| VCC Sector/Block (32K, 64K) Erase Current (SE/BE/BE32K) | ICC4 | 10 | 25 | mA | Erase in Progress, CS#=VCC | 91 | |
| VCC Chip Erase Current (CE) | ICC5 | 14 | 25 | mA | Erase in Progress, CS#=VCC | 91 | |
| Input Low Voltage | VIL | -0.5 | 0.8 | V | 91 | ||
| Output Low Voltage | VOL | 0.2 | V | IOL = 100uA | 91 | ||
| Clock Frequency for all commands (except Read) | fSCLK | 120 | MHz | Printed min is D.C.; all commands except Read | 92 | ||
| Clock Frequency for READ instructions | fRSCLK | 50 | MHz | READ instructions | 92 | ||
| Clock High Time | tCH | 7 | ns | ≤ 66MHz (fSCLK/fTSCLK) | 92 | ||
| Clock Low Time | tCL | 7 | ns | ≤ 66MHz (fSCLK/fTSCLK) | 92 | ||
| Clock Rise Time (peak to peak) | tCLCH | 0.1 | V/ns | Peak to peak | 92 | ||
| Clock Fall Time (peak to peak) | tCHCL | 0.1 | V/ns | Peak to peak | 92 | ||
| CS# Active Setup Time (relative to SCLK) | tSLCH | 3 | ns | 92 | |||
| CS# Not Active Hold Time (relative to SCLK) | tCHSL | 3 | ns | 92 | |||
| Data In Setup Time | tDVCH/tDVCL | 2 | ns | 92 | |||
| Data In Hold Time | tCHDX/tCLDX | 2 | ns | VCC: 2.7V - 3.6V | 92 | ||
| Data In Hold Time | tCHDX/tCLDX | 1 | ns | VCC: 3.0V - 3.6V, Loading 15pF/10pF | 92 | ||
| CS# Active Hold Time (relative to SCLK) | tCHSH | 3 | ns | 92 | |||
| CS# Not Active Setup Time (relative to SCLK) | tSHCH | 3 | ns | 92 | |||
| CS# Deselect Time | tSHSL | 7 | ns | From Read to next Read | 92 | ||
| CS# Deselect Time | tSHSL | 30 | ns | From Write/Erase/Program to Read Status Register | 92 | ||
| Output Disable Time | tSHQZ | 8 | ns | 92 | |||
| Clock Low to Output Valid | tCLQV | 8 | ns | Loading 30pF, VCC: 2.7V - 3.6V | 92 | ||
| Clock Low to Output Valid | tCLQV | 6 | ns | Loading 15pF, VCC: 2.7V - 3.6V | 92 | ||
| Clock Low to Output Valid | tCLQV | 5 | ns | Loading 10pF, VCC: 2.7V - 3.6V | 92 | ||
| Clock Low to Output Valid | tCLQV | 4.5 | ns | VCC: 3.0V - 3.6V, Loading 10pF, ODS (0,0) | 92 | ||
| Output Hold Time | tCLQX | 0 | ns | 92 | |||
| CS# High to Deep Power-down Mode | tDP | 10 | us | 92 | |||
| CS# High to Standby Mode without Electronic Signature Read | tRES1 | 30 | us | 92 | |||
| CS# High to Standby Mode with Electronic Signature Read | tRES2 | 30 | us | 92 | |||
| Write Status/Configuration Register Cycle Time | tW | 40 | ms | 92 | |||
| Write Extended Address Register | tWREAW | 40 | ns | 92 | |||
| Byte-Program | tBP | 15 | 30 | us | 92 | ||
| Page Program Cycle Time | tPP | 0.25 | 0.75 | ms | 92 | ||
| Sector Erase Cycle Time | tSE | 30 | 400 | ms | 92 | ||
| Block Erase (32KB) Cycle Time | tBE32 | 180 | 1000 | ms | 92 | ||
| Block Erase (64KB) Cycle Time | tBE | 380 | 2000 | ms | 92 | ||
| Chip Erase Cycle Time | tCE | 110 | 210 | s | 92 | ||
| Erase Suspend Latency | tESL | 25 | us | 92 | |||
| Program Suspend Latency | tPSL | 25 | us | 92 | |||
| Latency between Program Resume and next Suspend | tPRS | 0.3 | 100 | us | 92 | ||
| Latency between Erase Resume and next Suspend | tERS | 0.3 | 400 | us | 92 | ||
| Data Output Valid Time Difference among all SIO pins | tQVD | 600 | ps | 92 | |||
| VCC Rise Time | tVR | 500000 | us/V | 94 |
CAD (KiCad official)
- Symbol:
MX25L25673GM2I-08G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8-208mil (KiCad packages3D, STEP)
- 3D model files:
mx25l25673gm2i-08g-etched.step/mx25l25673gm2i-08g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mx25l25673gm2i-08g.step/mx25l25673gm2i-08g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MXIC Macronix datasheet (107 pp, sha256
fc94b4a58fc21642, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).