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Contents

README

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CW32L010F8U6

CW · Microcontrollers (MCU/MPU/SOC) · QFN-20-EP(3x3)

CW32L010F8U6 from CW, in a QFN-20-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PB07/NRST input Default function is the chip reset input (RST type); it can alternatively be configured as a GPIO that is input-only, selected by SYSCTRL_CR2.RSTIO.
2 PA00 bidirectional TTa I/O with digital alternates UART1_RXD, I2C_SDA, SPI_SCK, BTIM1_TOGP, BTIM3_ETR, ATIM_BK2, ATIM_CH4 and analog functions ADC_IN0, VC1_CH1, OSC_IN.
3 PA01 bidirectional TTa I/O with digital alternates UART1_TXD, I2C_SCL, SPI_CS, BTIM1_TOGN, GTIM_CH3, ATIM_BK, ATIM_CH4N and analog functions ADC_IN1, OSC_OUT.
4 VSS power_in Ground reference pin for the device; all voltages are specified relative to VSS.
5 Vcore power_out Internal regulator supply output; it must be connected to ground through a 100nF to 470nF capacitor and is for internal circuit use only.
6 VDD power_in Main power supply pin with a standard operating range of 1.62 V to 5.5 V; all VDD pins must be supplied at the same voltage.
7 PA02 bidirectional TTa I/O with digital alternates PCLK_OUT, SPI_CS, VC1_OUT, IR_OUT, ATIM_ETR, ATIM_CH1N and analog function ADC_IN2.
8 PB00 bidirectional TTa I/O with digital alternates UART1_RXD, UART2_CTS, SPI_SCK, I2C_SDA, LVD_OUT, BTIM3_TOGP, ATIM_CH1 and analog functions ADC_IN7, OSC32_OUT.
9 PB01 bidirectional TTa I/O with digital alternates UART1_TXD, UART2_RTS, SPI_CS, I2C_SCL, ADC_SAM, BTIM3_TOGN, ATIM_CH2 and analog functions ADC_IN8, OSC32_IN.
10 PA03 bidirectional TTa I/O with digital alternates UART2_TXD, LPTIM_CH1, SPI_MISO, BTIM1_ETR, IR_OUT, GTIM_CH4, ATIM_CH3 and analog functions ADC_IN3, VC1_CH2, LVD_CH1.
11 PA04 bidirectional TTa I/O with digital alternates UART2_RXD, LPTIM_CH2, SPI_MOSI, MCO_OUT, VC2_OUT, GTIM_CH3, ATIM_CH1N and analog function ADC_IN4.
12 PA05 bidirectional TTa I/O with digital alternates UART1_RXD, LPTIM_OUT, SPI_SCK, I2C_SDA, HEXEN, GTIM_CH2, ATIM_CH2N and analog functions ADC_IN5, VC2_CH1.
13 PA06 bidirectional TTa I/O with digital alternates UART1_TXD, LPTIM_ETR, SPI_MOSI, I2C_SCL, BTIM2_ETR, GTIM_CH1, ATIM_CH3N and analog function ADC_IN6.
14 PA07/SWDIO bidirectional TC standard I/O that after reset is configured as the SWDIO function with internal pull-up enabled; digital alternates include UART1_RXD, I2C_SDA, SPI_MISO, LPTIM_OUT, BTIM2_TOGP, ATIM_BK, ATIM_CH6.
15 PA08/SWCLK bidirectional TC standard I/O that after reset is configured as the SWCLK function with internal pull-up enabled; digital alternates include UART1_TXD, I2C_SCL, MCO_OUT, VC1_OUT, BTIM2_TOGN, ATIM_BK2, ATIM_CH6N.
16 PB02 bidirectional TTa I/O with digital alternates UART2_TXD, UART1_CTS, SPI_MISO, VC2_OUT, LPTIM_CH1, GTIM_ETR, ATIM_CH2 and analog functions ADC_IN9, VC2_CH2.
17 PB03 bidirectional TTa I/O with digital alternates UART2_RXD, UART1_RTS, SPI_MOSI, MCO_OUT, BTIM2_TOGN, GTIM_CH4, ATIM_CH2N and analog functions ADC_IN10, VC1_CH3.
18 PB04 bidirectional TTa I/O with digital alternates UART2_TXD, RTC_OUT, ADC_SAM, BTIM1_ETR, BTIM2_TOGP, GTIM_CH3, ATIM_CH1 and analog functions ADC_IN11, VC2_CH3.
19 PB05 bidirectional TTa I/O with digital alternates UART2_TXD, RTC_TAMP, SPI_MISO, I2C_SDA, GTIM_ETR, GTIM_CH2, ATIM_CH5 and analog functions ADC_IN12, VC1_CH0.
20 PB06 bidirectional TTa I/O with digital alternates UART2_RXD, RTC_OUT, SPI_MOSI, I2C_SCL, ATIM_ETR, GTIM_CH1, ATIM_CH5N and analog functions ADC_IN13, VC2_CH0.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer CW
Package QFN-20-EP(3x3)
Category Embedded Processors & Controllers
Pins 21

CAD (KiCad official)

  • Symbol: CW32L010F8U6
  • Footprint: Package_DFN_QFN:UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm
  • 3D model: QFN-20-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: cw32l010f8u6-etched.step / cw32l010f8u6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cw32l010f8u6.step / cw32l010f8u6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: CW datasheet (65 pp, sha256 baf3ee1d38472412, retrieved 2026-10-09, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF