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Contents

README

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TPS77715PWP

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-20-EP

TPS77715PWP from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND/HSINK power_in Ground/heatsink terminal of the PWP package, one of eight GND/HSINK pins (1, 2, 9, 10, 11, 12, 19, 20) that are tied together.
2 GND/HSINK power_in Ground/heatsink terminal of the PWP package, one of eight GND/HSINK pins (1, 2, 9, 10, 11, 12, 19, 20) that are tied together.
3 GND power_in Regulator ground.
4 NC unconnected No connect; no internal connection.
5 EN input Enable input; applying a TTL high signal shuts down the regulator and reduces quiescent current to 1 µA at TJ = 25°C.
6 IN power_in Input voltage to the regulator (IN pins 6 and 7 are tied together).
7 IN power_in Input voltage to the regulator (IN pins 6 and 7 are tied together).
8 NC unconnected No connect; no internal connection.
9 GND/HSINK power_in Ground/heatsink terminal of the PWP package, one of eight GND/HSINK pins (1, 2, 9, 10, 11, 12, 19, 20) that are tied together.
10 GND/HSINK power_in Ground/heatsink terminal of the PWP package, one of eight GND/HSINK pins (1, 2, 9, 10, 11, 12, 19, 20) that are tied together.
11 GND/HSINK power_in Ground/heatsink terminal of the PWP package, one of eight GND/HSINK pins (1, 2, 9, 10, 11, 12, 19, 20) that are tied together.
12 GND/HSINK power_in Ground/heatsink terminal of the PWP package, one of eight GND/HSINK pins (1, 2, 9, 10, 11, 12, 19, 20) that are tied together.
13 OUT power_out Regulated output voltage; the output needs at least 10 µF with ESR between 50 mΩ and 1.5 Ω.
14 OUT power_out Regulated output voltage; the output needs at least 10 µF with ESR between 50 mΩ and 1.5 Ω.
15 FB/NC input Feedback input for the adjustable version only; no connect on fixed-output options such as the 1.5-V TPS77715.
16 RESET output Open-drain RESET output that initiates a reset on an output undervoltage condition, with a 200 ms delay.
17 NC unconnected No connect; no internal connection.
18 NC unconnected No connect; no internal connection.
19 GND/HSINK power_in Ground/heatsink terminal of the PWP package, one of eight GND/HSINK pins (1, 2, 9, 10, 11, 12, 19, 20) that are tied together.
20 GND/HSINK power_in Ground/heatsink terminal of the PWP package, one of eight GND/HSINK pins (1, 2, 9, 10, 11, 12, 19, 20) that are tied together.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-20-EP
Category Power Management (PMIC)
Pins 21

CAD (KiCad official)

  • Symbol: TPS77715PWP
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tps77715pwp-etched.step / tps77715pwp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps77715pwp.step / tps77715pwp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 011757d41db41f42, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF