Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

TPS70251PWPR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-20

TPS70251PWPR from Texas Instruments, in a HTSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection; leave unconnected.
2 VIN1 power_in Input voltage of regulator 1; the UVLO circuit keeps the internal regulators off until VIN1 reaches 2.5 V, and internal bias voltages are powered from VIN1.
3 VIN1 power_in Input voltage of regulator 1; the UVLO circuit keeps the internal regulators off until VIN1 reaches 2.5 V, and internal bias voltages are powered from VIN1.
4 MR input Manual reset input, active low, pulled up internally to VIN1 through a 6 µA pull-up current; pulling it low triggers a POR (RESET).
5 EN1 input Active-low enable for VOUT1; driving it high puts regulator 1 into shutdown/sleep mode.
6 EN2 input Active-low enable for VOUT2; driving it high puts regulator 2 into shutdown/sleep mode.
7 RESET output Open-drain, active-low SVS (power-on reset) output that goes low on an undervoltage condition or MR action and requires a pull-up resistor; it can be left floating if unused.
8 GND power_in Ground reference for the device.
9 VIN2 power_in Input voltage of regulator 2.
10 VIN2 power_in Input voltage of regulator 2.
11 NC unconnected No internal connection; leave unconnected.
12 VOUT2 power_out Output voltage of regulator 2, which supports up to 250 mA.
13 VOUT2 power_out Output voltage of regulator 2, which supports up to 250 mA.
14 VSENSE2/FB2 input Regulator 2 output voltage sense for fixed versions (connect to VOUT2 as close to the device as possible) or feedback input for the adjustable version.
15 PG2 output Open-drain output that goes low when VOUT2 is below 95% of its nominal regulated voltage and requires a pull-up resistor.
16 PG1 output Open-drain output that goes low when VOUT1 is below 95% of its nominal regulated voltage and requires a pull-up resistor.
17 VSENSE1/FB1 input Regulator 1 output voltage sense for fixed versions (connect to VOUT1 as close to the device as possible) or feedback input for the adjustable version.
18 VOUT1 power_out Output voltage of regulator 1, which supports up to 500 mA.
19 VOUT1 power_out Output voltage of regulator 1, which supports up to 500 mA.
20 NC unconnected No internal connection; leave unconnected.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-20
Category Power Management (PMIC)
Pins 21

CAD (KiCad official)

  • Symbol: TPS70251PWPR
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: HTSSOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tps70251pwpr-etched.step / tps70251pwpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps70251pwpr.step / tps70251pwpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (39 pp, sha256 442e41a4a4622bc2, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF