Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

SN74LS365ADR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-16

SN74LS365ADR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G1 input Active-low output-enable input G1, which is gated with G2 to enable the 3-state outputs of the hex bus driver.
2 A1 input Data input A1 of driver 1, non-inverting to Y1.
3 Y1 tri_state 3-state non-inverting output of driver 1, which follows A1 when enabled.
4 A2 input Data input A2 of driver 2, non-inverting to Y2.
5 Y2 tri_state 3-state non-inverting output of driver 2, which follows A2 when enabled.
6 A3 input Data input A3 of driver 3, non-inverting to Y3.
7 Y3 tri_state 3-state non-inverting output of driver 3, which follows A3 when enabled.
8 GND power_in Ground terminal; all voltage values are with respect to this network ground terminal.
9 Y4 tri_state 3-state non-inverting output of driver 4, which follows A4 when enabled.
10 A4 input Data input A4 of driver 4, non-inverting to Y4.
11 Y5 tri_state 3-state non-inverting output of driver 5, which follows A5 when enabled.
12 A5 input Data input A5 of driver 5, non-inverting to Y5.
13 Y6 tri_state 3-state non-inverting output of driver 6, which follows A6 when enabled.
14 A6 input Data input A6 of driver 6, non-inverting to Y6.
15 G2 input Active-low output-enable input G2, which is gated with G1 to enable the 3-state outputs of the hex bus driver.
16 VCC power_in Supply voltage pin; absolute maximum rating is 7 V with respect to ground.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: SN74LS365ADR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: sn74ls365adr-etched.step / sn74ls365adr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls365adr.step / sn74ls365adr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 f3660b50e9237779, retrieved 2026-10-07, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF