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MAX38889AATE+
Public Made by Adomby adom
MAXIM INTEGRATED Global Sourcing Parts, TQFN-16(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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PCB Footprint
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Datasheet
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README
markdownMAX38889AATE+
MAXIM INTEGRATED · Global Sourcing Parts · TQFN-16(3x3)
MAX38889AATE+ from MAXIM INTEGRATED, in a TQFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ENC | input | Charger enable input: drive high to enable supercapacitor charging while VSYS is above the charging threshold, drive low to disable charging, with ENC above 950mV and tied to SYS if not driven. |
| 2 | ENB | input | Backup enable input: drive high to enable system backup when VSYS drops below the backup threshold, drive low to disable backup, with ENB above 950mV and tied to SYS if not driven. |
| 3 | RDY | output | Ready status pin: open-drain output with a pullup to a logic supply, pulled low when VFBCR is below 0.5V and released when it is above 0.5V, and pulled low when VENC and VENB are both low. |
| 4 | BKB | output | Backup status pin: open-drain output with a pullup to a logic supply, pulled low when VFBS is regulating at 1.2V and released when VFBS is above 1.23V. |
| 5 | CAP | passive | Supercapacitor connection: connect to a supercapacitor rated 0.8V to 5V, with a 22µF high-frequency capacitor placed close to the pin. |
| 6 | LX | passive | Inductor switching node: connect a 0.47µH inductor from LX to CAP and keep it separated from the feedback nodes FBS, FBCH and FBCR as much as possible. |
| 7 | LX | passive | Inductor switching node: connect a 0.47µH inductor from LX to CAP and keep it separated from the feedback nodes FBS, FBCH and FBCR as much as possible. |
| 8 | LX | passive | Inductor switching node: connect a 0.47µH inductor from LX to CAP and keep it separated from the feedback nodes FBS, FBCH and FBCR as much as possible. |
| 9 | FBCR | input | Supercapacitor ready input: RDY goes high when VFBCR reaches 0.5V. |
| 10 | FBCH | input | Supercapacitor feedback input: a resistor divider from CAP to FBCH to GND sets the maximum supercapacitor charging voltage, and charging halts when VFBCH reaches 0.5V. |
| 11 | FBS | input | System feedback input: a resistor divider from SYS to FBS to GND sets the system backup operating voltage, and charging from SYS begins when VFBS is above 102.5% of VFBS_BU. |
| 12 | ISET | passive | Charge/discharge current select: sets ICAP_CHG = 1.5A x (33kΩ/RISET) during charging and peak backup inductor current ILX_BU = 3A x (33kΩ/RISET), with RISET from 33kΩ to 100kΩ. |
| 13 | SYS | power_in | System supply: connect to the system supply, bypass with 2x47µF and 2x22µF ceramic capacitors to PGND, and place a 1µF high-frequency filter capacitor close to the part across SYS and PGND. |
| 14 | SYS | power_in | System supply: connect to the system supply, bypass with 2x47µF and 2x22µF ceramic capacitors to PGND, and place a 1µF high-frequency filter capacitor close to the part across SYS and PGND. |
| 15 | PGND | power_in | Power ground for the switching power path. |
| 16 | PGND | power_in | Power ground for the switching power path. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MAXIM INTEGRATED |
| Package | TQFN-16(3x3) |
| Category | Global Sourcing Parts |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| SYS Voltage Range | VSYS | 2.5 | 5.5 | V | Guaranteed by LX peak backup current and SYS shutdown current | 3 | |
| CAP Voltage Range | VCAP | 0.5 | 5.5 | V | Guaranteed by maximum on-time and CAP shutdown current | 3 | |
| SYS Shutdown Current | ISYS_SD | 0.01 | 1 | µA | VSYS = 5.5V, VENC = VENB = 0V, TA = +25°C | 3 | |
| SYS Shutdown Current | ISYS_SD | 0.46 | µA | VSYS = 5.5V, VENC = VENB = 0V, TA = +125°C | 3 | ||
| SYS Ready Supply Current | ISYS_RDY | 4.5 | 8 | µA | VFBS = 1.3V, VFBCH = 0.515V, VFBCR = 0.6V, TA = +25°C | 3 | |
| SYS Ready Supply Current | ISYS_RDY | 8 | µA | VFBS = 1.3V, VFBCH = 0.515V, VFBCR = 0.6V, TA = +125°C | 3 | ||
| SYS Backup Supply Current | ISYS_BU | 75 | 150 | µA | VFBS = 1.212V, VFBCH = 0.5V, VFBCR = 0.6V | 3 | |
| CAP Shutdown Current | ICAP_SD | 0.01 | 1 | µA | VCAP = 5.5V, VENC = VENB = 0V, TA = +25°C | 3 | |
| CAP Shutdown Current | ICAP_SD | 0.2 | µA | VCAP = 5.5V, VENC = VENB = 0V, TA = +125°C | 3 | ||
| System Undervoltage Threshold | VUVLOF | 2.1 | 2.2 | 2.3 | V | VSYS falling, 100mV typical hysteresis, VCAP = 0V | 3 |
| FBS Backup Voltage | VFBS_BU | 1.188 | 1.2 | 1.212 | V | VFBS rising, when discharging stops | 3 |
| FBS Charging Threshold | VFBS_CHG | 2 | 2.5 | 3 | % | From VFBS backup voltage, when charging begins | 3 |
| FBCH Threshold | VTH_FBCH | 0.495 | 0.5 | 0.505 | V | VFBCH rising, when charging stops; 10mV typical hysteresis | 3 |
| FBCR Threshold | VTH_FBCR | 0.495 | 0.5 | 0.505 | V | VFBCR rising, when RDY releases; 10mV typical hysteresis | 3 |
| ENC Input Threshold VIL | VIL | 600 | 850 | mV | VFBS = 1.3V, VFBCH = 0.4V, when LX switching, VENC rising | 3 | |
| ENC Input Threshold VIH | VIH | 950 | 1200 | mV | VFBS = 1.3V, VFBCH = 0.4V, when LX switching, VENC falling | 3 | |
| ENB Input Threshold VIL | VIL | 600 | 850 | mV | VFBS = 1.1V, VFBCH = 0.4V, when LX switching, VENB rising | 3 | |
| ENB Input Threshold VIH | VIH | 950 | 1200 | mV | VFBS = 1.1V, VFBCH = 0.4V, when LX switching, VENB falling | 3 | |
| ISET Resistor Range | RISET | 33 | 100 | kΩ | Guaranteed by LX peak current limits | 3 | |
| LX Peak Backup Current Limit | ILX_BU | 2.25 | 3 | 3.75 | A | Circuit of Figure 1, VCAP = 2V, VSYS = 2.5V (Note 1), RISET = 33kΩ | 4 |
| LX Peak Backup Current Limit | ILX_BU | 1 | A | Circuit of Figure 1, VCAP = 2V, VSYS = 2.5V (Note 1), RISET = 100kΩ | 4 | ||
| LX Peak Charge Current Limit | ILX_CHG | 2.25 | 3 | 3.75 | A | Circuit of Figure 1, VSYS = 3.7V, VCAP = 2V, RISET = 33kΩ (Note 1) | 4 |
| LX Peak Charge Current Limit | ILX_CHG | 1 | A | Circuit of Figure 1, VSYS = 3.7V, VCAP = 2V, RISET = 100kΩ (Note 1) | 4 | ||
| Feedback Input Bias Current | IFBS, IFBCH, IFBCR | -0.1 | 0.01 | 0.1 | µA | VFBS = 1.2V, VFBCH = VFBCR = 0.5V, TA = +25°C | 4 |
| Enable Input Leakage Current | IENC, IENB | -1 | 0.004 | 1 | µA | 0V < VENC, VENB < 5.5V, TA = +25°C | 4 |
| LX Low-Side FET Resistance | RLOW | 42 | 84 | mΩ | VLX switched to 0V | 4 | |
| LX High-Side FET Resistance | RHIGH | 57 | 114 | mΩ | VLX switched to VSYS | 4 | |
| LX Leakage Current | ILX_LKG | -1 | 0.01 | 1 | µA | VENC = VENB = 0V, VSYS = 5.5V, VLX = 0 to 5.5V, TA = +25°C | 4 |
| LX Leakage Current | ILX_LKG | 0.26 | µA | VENC = VENB = 0V, VSYS = 5.5V, VLX = 0 to 5.5V, TA = +125°C | 4 | ||
| Maximum On-Time | tON | 320 | 400 | 480 | ns | Typical Application Circuit, VSYS = 2.9V, VCAP = 2V | 4 |
| Minimum Off-Time | tOFF | 80 | 100 | 120 | ns | Backup mode, VFBS = 1.164V | 4 |
| Maximum Duty Cycle | DutyMAX | 90 | 95 | % | VCAP = 0.5V | 4 | |
| Overtemperature Lockout Threshold | TOTLO | 165 | °C | TJ rising, 15°C typical hysteresis | 4 | ||
| Logic Output Leakage High | IBKB_H | -1 | 0.001 | 1 | µA | VBKB = 5.5V, VRDY = 5.5V, TA = +25°C | 4 |
| Logic Output Voltage Low | VBKB_L, VRDY_L | 0.1 | 0.4 | V | IBKB = 10mA, IRDY = 10mA | 4 | |
| Absolute maximum: CAP, ENB, ENC to GND | -0.3 | 6 | V | 2 | |||
| Absolute maximum: SYS, BKB, RDY to GND | -0.3 | 6 | V | 2 | |||
| Absolute maximum: PGND to GND | -0.3 | 0.3 | V | 2 | |||
| Operating Temperature Range | -40 | 125 | °C | 2 | |||
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Maximum Junction Temperature | 150 | °C | 2 | ||||
| Lead Temperature (soldering, 10 seconds) | 300 | °C | soldering, 10 seconds | 2 | |||
| Soldering Temperature (reflow) | 260 | °C | reflow | 2 | |||
| LX RMS Current | -5 | 5 | ARMS | 2 | |||
| Junction to Ambient thermal resistance | θJA | 43.3 | °C/W | Four-layer board, JESD51-7 | 2 | ||
| Junction to Case thermal resistance | θJC | 4 | °C/W | Four-layer board, JESD51-7 | 2 |
CAD (KiCad official)
- Symbol:
MAX38889AATE+ - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: TQFN-16(3x3) (KiCad packages3D, STEP)
- 3D model files:
max38889aate-etched.step/max38889aate-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max38889aate.step/max38889aate.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MAXIM INTEGRATED datasheet (17 pp, sha256
76c88f69bb2cb1f4, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).