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TPS3780DDRYR

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Texas Instruments Monitors & Reset Circuits, uSON-6(1x1.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TPS3780DDRYR

Texas Instruments · Monitors & Reset Circuits · uSON-6(1x1.5)

TPS3780DDRYR from Texas Instruments, in a uSON-6(1x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SENSE1 input Connected to the monitored voltage through an external resistor divider; OUT1 is asserted when the voltage at this pin drops below VIT-.
2 GND power_in Ground.
3 SENSE2 input Connected to the monitored voltage through an external resistor divider; OUT2 is asserted when the voltage at this pin drops below VIT-.
4 OUT2 output Open-drain output for SENSE2 on the TPS3780, driven low when SENSE2 falls below VIT- and released high after SENSE2 rises above VIT+; it can be pulled up to 6.5 V independent of VDD and requires a pull-up resistor.
5 OUT1 output Open-drain output for SENSE1 on the TPS3780, driven low when SENSE1 falls below VIT- and released high after SENSE1 rises above VIT+; it can be pulled up to 6.5 V independent of VDD and requires a pull-up resistor.
6 VDD power_in Supply voltage input of 1.5 V to 6.5 V, with a 0.1-µF ceramic capacitor recommended close to the pin (required for VDD < 1.5 V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package uSON-6(1x1.5)
Category Power Supply Chip
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input supply range VDD 1.5 6.5 V 5
Power-on reset voltage V(POR) 0.8 V VOL (max) = 0.2 V, IOL = 15 µA 5
Supply current IDD 2.09 3.72 µA VDD = 3.3 V, no load, -40°C < TJ < 85°C 5
Supply current IDD 5.8 µA VDD = 3.3 V, no load, -40°C < TJ < 125°C 5
Supply current IDD 2.29 4 µA VDD = 6.5 V, no load, -40°C < TJ < 85°C 5
Supply current IDD 6.5 µA VDD = 6.5 V, no load, -40°C < TJ < 125°C 5
Positive-going input threshold tolerance VIT+ -1 1 % V(SENSE) rising 5
Positive-going input threshold VIT+ 1.194 V V(SENSE) rising 5
Negative-going input threshold tolerance (TPS37xxD, 1% hysteresis) VIT- -1 1 % V(SENSE) falling 5
Negative-going input threshold (TPS37xxD, 1% hysteresis) VIT- 1.182 V V(SENSE) falling 5
Input current I(SENSE) -15 15 nA V(SENSE) = 0 V or VDD 5
Low-level output voltage VOL 0.25 V VDD ≥ 1.2 V, ISINK = 0.4 mA 5
Low-level output voltage VOL 0.3 V VDD ≥ 4.5 V, ISINK = 3.2 mA 5
Open-drain output leakage current Ilkg(OD) -50 50 nA High impedance, V(SENSE) = V(OUT) = 6.5 V, -40°C < TJ < 85°C 5
Open-drain output leakage current Ilkg(OD) -250 250 nA High impedance, V(SENSE) = V(OUT) = 6.5 V, -40°C < TJ < 125°C 5
SENSE (rising) to OUT propagation delay tPD(r) 5.5 µs SENSE transitions between 0 V and 1.3 V 6
SENSE (falling) to OUT propagation delay tPD(f) 10 µs SENSE transitions between 0 V and 1.3 V 6
Startup delay tSD 570 µs SENSE transitions between 0 V and 1.3 V 6
VDD VDD -0.3 7 V 4
OUT1, OUT2 voltage (TPS3780 only) -0.3 7 V 4
SENSE1, SENSE2 voltage -0.3 7 V 4
OUT1, OUT2 current -20 20 mA 4
Operating junction temperature TJ -40 125 °C 4
Storage temperature Tstg -65 150 °C 4
ESD HBM V(ESD) -2000 2000 V Human body model, ANSI/ESDA/JEDEC JS-001 4
ESD CDM V(ESD) -500 500 V Charged device model, JESD22-C101 4
Power-supply voltage VDD 1.5 6.5 V 4
Sense voltage SENSE1, SENSE2 0 6.5 V 4
Output voltage OUT1, OUT2 (TPS3780 only) 0 6.5 V 4
Pullup resistor (TPS3780 only) RPU 1.5 10000 kΩ 4
Output current OUT1, OUT2 -5 5 mA 4
Input capacitor CIN 0.1 µF 4
Junction temperature TJ -40 25 125 °C 4
Junction-to-ambient thermal resistance RθJA 306.7 °C/W DRY (USON), 6 pins 4
Junction-to-case (top) thermal resistance RθJC(top) 174.1 °C/W DRY (USON), 6 pins 4
Junction-to-board thermal resistance RθJB 173.4 °C/W DRY (USON), 6 pins 4
Junction-to-top characterization parameter ψJT 30.9 °C/W DRY (USON), 6 pins 4
Junction-to-board characterization parameter ψJB 171.6 °C/W DRY (USON), 6 pins 4
Junction-to-case (bottom) thermal resistance RθJC(bot) 65.2 °C/W DRY (USON), 6 pins 4

CAD (KiCad official)

  • Symbol: TPS3780DDRYR
  • Footprint: Package_SON:Texas_USON-6_1x1.45mm_P0.5mm_SMD
  • 3D model: uSON-6(1x1.5) (KiCad packages3D, STEP)
  • 3D model files: tps3780ddryr-etched.step / tps3780ddryr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps3780ddryr.step / tps3780ddryr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 a7da8ded4f330b8d, retrieved 2026-10-23, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF