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SY8120B1ABC

Silergy Corp · DC-DC Converters · SOT-23-6

SY8120B1ABC from Silergy Corp, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BS passive Boot-strap pin. Supplies the high-side gate driver via a bootstrap capacitor. Decouple to LX with a 0.1 µF ceramic capacitor. Absolute maximum BS-LX voltage is 4 V.
2 GND power_in Device ground. Also serves as the thermal case reference (θJC measured at this pin). Connect to a large PCB copper plane for best thermal and noise performance.
3 FB input Output feedback pin. Connect to the center point of the external resistor divider to program VOUT via Vout = 0.6 × (1 + R1/R2). Internal reference is 0.6 V ±2%; FB input current is ±50 nA max.
4 EN input Enable control input. Pull high (≥1.5 V) to turn the regulator on, pull below 0.4 V to shut down. Do not float; absolute maximum is VIN + 0.3 V. Consider a 1 MΩ pull-down to GND if driven from a high-impedance source.
5 IN power_in Input supply pin. Operates from 4.5 V to 18 V (19 V absolute maximum). Decouple to GND with at least a 1 µF (4.7 µF recommended) low-ESR X5R ceramic capacitor placed close to the pin.
6 LX power_out Switching node. Connect to the external output inductor. Internal top FET RDS(on) 130 mΩ, bottom FET 120 mΩ; peak current limit 3.6 A, valley current limit 2 A. Minimize PCB copper area on this net to reduce EMI.

Key specifications

Parameter Value
Manufacturer Silergy Corp
Package SOT-23-6
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • SY8120B1ABC

CAD (KiCad official)

  • Symbol: SY8120B1ABC
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sy8120b1abc.step 97 KB You want the bare part, or you mark your own boards.
sy8120b1abc-etched.step 2.3 MB You want the part with SY8120B1ABC already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 557 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Silergy Corp datasheet (10 pp, sha256 4d5e03637d5e3991, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF