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Contents

README

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SN74AUC2G00DCUR

Texas Instruments · Logic Gates · VSSOP-8

SN74AUC2G00DCUR from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Gate 1 input A; tolerant to 3.6 V, and unused inputs must be held at VCC or GND.
2 1B input Gate 1 input B; tolerant to 3.6 V, and unused inputs must be held at VCC or GND.
3 2Y output Gate 2 NAND output (Y = A·B inverted), with ±8 mA drive at 1.8 V.
4 GND power_in Ground reference for the device.
5 2A input Gate 2 input A; tolerant to 3.6 V, and unused inputs must be held at VCC or GND.
6 2B input Gate 2 input B; tolerant to 3.6 V, and unused inputs must be held at VCC or GND.
7 1Y output Gate 1 NAND output (Y = A·B inverted), with ±8 mA drive at 1.8 V.
8 VCC power_in Supply voltage, operating range 0.8 V to 2.7 V (designed for 1.65 V to 1.95 V), absolute maximum 3.6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-8
Category Logic
Pins 8

CAD (KiCad official)

  • Symbol: SN74AUC2G00DCUR
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: sn74auc2g00dcur-etched.step / sn74auc2g00dcur-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74auc2g00dcur.step / sn74auc2g00dcur.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (19 pp, sha256 5b8ab28d622e6cd0, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF