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CD4015NS16ARDQ

Public Made by Adom

by adom

GR Shift Registers, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

markdown

CD4015NS16ARDQ

GR · Shift Registers · SOP-16

CD4015NS16ARDQ from GR, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLOCK B input Clock input for Register B; data is shifted one stage on each positive-going clock transition.
2 Q4B output Register B output from stage 4.
3 Q3A output Register A output from stage 3.
4 Q2A output Register A output from stage 2.
5 Q1A output Register A output from stage 1.
6 RESET A input Register A reset input; a high level resets all stages of Register A (Q outputs go low).
7 DATA A input Serial data input for Register A, transferred into the first stage on the clock transition; inputs are protected by diodes to VDD and VSS.
8 VSS power_in Ground reference for all voltages; supply-to-ground rating is VDD -0.5 to 20 V referenced to VSS.
9 CLOCK A input Clock input for Register A; data is shifted one stage on each positive-going clock transition.
10 Q4A output Register A output from stage 4.
11 Q3B output Register B output from stage 3.
12 Q2B output Register B output from stage 2.
13 Q1B output Register B output from stage 1.
14 RESET B input Register B reset input; a high level resets all stages of Register B (Q outputs go low).
15 DATA B input Serial data input for Register B, transferred into the first stage on the clock transition; inputs are protected by diodes to VDD and VSS.
16 VDD power_in Positive supply; absolute maximum DC supply range is -0.5 to 20 V referenced to VSS.

Key specifications

Parameter Value
Manufacturer GR
Package SOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Current IDD 0 1 uA VO=--; VIN=0,5; VDD=5 4
Low Level Output Current IOL 1.5 3 mA VO=0.4; VIN=0,5; VDD=5 4
Low Level Output Current IOL 3.5 7 mA VO=0.5; VIN=0,10; VDD=10 4
Low Level Output Current IOL 14 28 mA VO=1.5; VIN=0,15; VDD=15 4
High Level Output Current IOH -0.5 -1 mA VO=4.6; VIN=0,5; VDD=5 4
High Level Output Current IOH -2.5 -5 mA VO=2.5; VIN=0,5; VDD=5 4
High Level Output Current IOH -1 -2 mA VO=9.5; VIN=0,10; VDD=10 4
High Level Output Current IOH -4 -8 mA VO=13.5; VIN=0,15; VDD=15 4
Low Level Output Voltage VOL 0 0.05 V VO=--; VIN=0,5; VDD=5 4
High Level Output Voltage VOH 4.95 5 V VO=--; VIN=0,5; VDD=5 4
High Level Output Voltage VOH 9.95 10 V VO=--; VIN=0,10; VDD=10 4
High Level Output Voltage VOH 14.95 15 V VO=--; VIN=0,15; VDD=15 4
Low Level Input Voltage VIL 1.5 V VO=0.5,4.5; VIN=--; VDD=5 4
Low Level Input Voltage VIL 3 V VO=1,9; VIN=--; VDD=10 4
Low Level Input Voltage VIL 4 V VO=1.5,13.5; VIN=--; VDD=15 4
High Level Input Voltage VIH 3.5 V VO=0.5,4.5; VIN=--; VDD=5 4
High Level Input Voltage VIH 7 V VO=1,9; VIN=--; VDD=10 4
High Level Input Voltage VIH 11 V VO=1.5,13.5; VIN=--; VDD=15 4
Input Leakage Current IIN -1 0 1 uA VO=--; VIN=0,18; VDD=18 4
DC Supply Voltage Range (referenced to VSS) VDD -0.5 20 V 4
Power Dissipation PD 500 mW 4
Junction Temperature TJ 125 ℃ 4
Operating Temperature TOP -40 85 ℃ 4

CAD (KiCad official)

  • Symbol: CD4015NS16ARDQ
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: cd4015ns16ardq-etched.step / cd4015ns16ardq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4015ns16ardq.step / cd4015ns16ardq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GR datasheet (8 pp, sha256 e938f436d41b6f96, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF