Combines a four-channel 8-bit analog-to-digital converter and one 8-bit digital-to-analog output on a single I2C device, so a host reads four analog inputs and drives one analog output over two wires. The ADC inputs work single-ended or as differential pairs, an external VREF sets the span, and three address pins put up to eight devices on one bus. It runs from 2.5 to 6 V. The classic all-in-one analog I/O expander for hobby and instrument boards.

Pinout

Pin	Name	Type	Function
1	AIN0	input	Analog input channel 0 to the A/D converter. Selectable as single-ended or differential input via the control byte.
2	AIN1	input	Analog input channel 1 to the A/D converter. Selectable as single-ended or differential input via the control byte.
3	AIN2	input	Analog input channel 2 to the A/D converter. Selectable as single-ended or differential input via the control byte.
4	AIN3	input	Analog input channel 3 to the A/D converter. Selectable as single-ended or differential input via the control byte.
5	A0	input	Hardware slave address bit 0. Tied to VSS or VDD to program the I2C slave address (LSB of hardware address).
6	A1	input	Hardware slave address bit 1. Tied to VSS or VDD to program the I2C slave address.
7	A2	input	Hardware slave address bit 2. Tied to VSS or VDD to program the I2C slave address (MSB of hardware address).
8	VSS	power_in	Ground supply / digital ground reference (0 V).
9	SDA	bidirectional	I2C-bus serial data input/output line. Open-drain; requires an external pull-up resistor to VDD.
10	SCL	input	I2C-bus serial clock input from the master. Requires an external pull-up resistor to VDD.
11	OSC	bidirectional	Oscillator input/output. When the internal oscillator is used (EXT tied to VSS), OSC provides the oscillator frequency output; when EXT is tied to VDD, OSC becomes the external clock input.
12	EXT	input	External/internal oscillator select. Tie to VSS to enable the internal oscillator; tie to VDD to disable the internal oscillator and use an external clock applied at OSC.
13	AGND	power_in	Analog ground supply for the ADC/DAC resistor divider chain. Must be connected to the system analog ground; may sit at a DC offset with respect to VSS.
14	VREF	input	Voltage reference input for the on-chip ADC/DAC resistor divider chain. Sets the analog full-scale span between AGND and VREF; must be kept stable during conversion.
15	AOUT	output	Analog output from the on-chip 8-bit D/A converter. Buffered by an auto-zeroed unity-gain amplifier; high-impedance when the analog-output-enable flag in the control register is 0.
16	VDD	power_in	Positive supply voltage, 2.5 V to 6.0 V.

Key specifications

Parameter	Value
Type	8-bit ADC (4-ch) + 8-bit DAC
Interface	I2C
ADC inputs	4 single-ended or 2 differential
DAC	1 analog output (AOUT)
Reference	External (VREF)
Addresses	8 (A0-A2)
Supply	2.5-6 V
Package	SOIC-16

Ordering variants

Same part, different packaging or reel option.

PCF8591T (SOIC-16)
PCF8591P (DIP-16)
PCF8591TS (SSOP-20)

CAD (KiCad official)

Symbol: Interface_Expansion:PCF8591 (KiCad official)
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: NXP datasheet (31 pp, sha256 b89feb48ffdbebfe, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF