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LM217LD13TR

Public Made by Adom

by adom

STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Datasheet

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Contents

README

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LM217LD13TR

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

LM217LD13TR from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Unregulated positive input supply. Input-to-output differential up to 40 V max. A 0.1 uF bypass capacitor to ground is recommended near the pin.
2 VOUT power_out Regulated output. Adjustable from 1.2 V to 37 V; delivers up to 100 mA of load current. Requires a minimum load current (typ. 3.5 mA) for regulation.
3 VOUT power_out Regulated output (internally tied to pin 2). SO-8 doubles the output pin for improved current handling and thermal performance.
4 ADJ input Adjustment pin. Connects to the top of the external resistor divider that sets Vout = Vref x (1 + R2/R1) + Iadj x R2, with Vref = 1.25 V typ. Adjust pin current is 50 uA typ (100 uA max).
5 NC unconnected No internal connection. Leave floating or tie to a copper pour for mechanical support.
6 VOUT power_out Regulated output (internally tied to pins 2 and 3). SO-8 provides three output pins for improved current handling and thermal dissipation.
7 VOUT power_out Regulated output (internally tied to pins 2, 3, and 6). SO-8 pins 2/3/6/7 are all the regulator output.
8 NC unconnected No internal connection. Leave floating or tie to a copper pour for mechanical support.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOIC-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • LM217LD13TR
  • LM217LD13TRLM317LD13TR
  • LM217LD13TRLM317LZ
  • LM217LD13TRLM317LZ-AP
  • LM217LD13TRLM317LZ-TR
  • LM217LZ-TR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input-output differential voltage VI-VO 40 V 5
Operating junction temperature range TOP -40 125 °C for LM217L 5
Storage temperature range TSTG -55 150 °C 5
Line regulation DVO 0.01 0.02 %/V VI - VO = 3 to 40 V, IL 20 mA; TJ = 25°C 6
Line regulation DVO 0.02 0.05 %/V VI - VO = 3 to 40 V, IL 20 mA 6
Load regulation DVO 5 15 mV VO ≤ 5 V, IO = 5 to 100 mA; TJ = 25°C 6
Load regulation DVO 20 50 mV VO ≤ 5 V, IO = 5 to 100 mA 6
Load regulation DVO 0.1 0.3 % VO ≥ 5 V, IO = 5 to 100 mA; TJ = 25°C 6
Load regulation DVO 0.3 1 % VO ≥ 5 V, IO = 5 to 100 mA 6
Adjustment pin current IADJ 50 100 µA 6
Adjustment pin current change DIADJ 0.2 5 µA VI - VO = 3 to 40 V, IO = 5 to 100 mA; Pd < 625 mW 6
Reference voltage VREF 1.2 1.25 1.3 V VI - VO = 3 to 40 V, IO = 10 to 500 mA; Pd < 625 mW 6
Minimum load current IO(min) 3.5 5 mA VI - VO = 40 V 6
Maximum output current IO(max) 100 200 mA VI - VO = 3 to 13 V 6
Supply voltage rejection SVR 66 80 dB TJ = 25°C, f = 120 Hz, CADJ = 10 µF 6
Maximum output current IO(max) 50 mA VI - VO = 40 V 6
Supply voltage rejection SVR 65 dB TJ = 25°C, f = 120 Hz, CADJ = 0 6
Output voltage temperature stability DVO/VO 0.7 % 6
Output noise voltage eN 0.003 % B = 10 Hz to 10 KHz, TJ = 25°C 6

CAD (KiCad official)

  • Symbol: LM217LD13TR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: lm217ld13tr-etched.step / lm217ld13tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm217ld13tr.step / lm217ld13tr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
lm217ld13tr.step 122 KB You want the bare part, or you mark your own boards.
lm217ld13tr-etched.step 1.8 MB You want the part with LM217LD13TR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 464 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (23 pp, sha256 6f70ef728068a972, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF