component
SN74ALVC126DR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74ALVC126DR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-14
SN74ALVC126DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable for buffer 1, active low: 1Y is disabled to high impedance when 1OE is low, and OE should be tied to GND through a pulldown resistor to ensure high impedance during power up or power down. |
| 2 | 1A | input | Data input of buffer 1; input voltage range is 0 V to 3.6 V and unused inputs must be held at VCC or GND. |
| 3 | 1Y | tri_state | 3-state output of buffer 1, driven from 1A when 1OE is high and high impedance when 1OE is low; output voltage is limited to 0 V to VCC. |
| 4 | 2OE | input | Output enable for buffer 2, active low: 2Y is disabled to high impedance when 2OE is low, and OE should be tied to GND through a pulldown resistor to ensure high impedance during power up or power down. |
| 5 | 2A | input | Data input of buffer 2; input voltage range is 0 V to 3.6 V and unused inputs must be held at VCC or GND. |
| 6 | 2Y | tri_state | 3-state output of buffer 2, driven from 2A when 2OE is high and high impedance when 2OE is low; output voltage is limited to 0 V to VCC. |
| 7 | GND | power_in | Ground reference for the device. |
| 8 | 3Y | tri_state | 3-state output of buffer 3, driven from 3A when 3OE is high and high impedance when 3OE is low; output voltage is limited to 0 V to VCC. |
| 9 | 3A | input | Data input of buffer 3; input voltage range is 0 V to 3.6 V and unused inputs must be held at VCC or GND. |
| 10 | 3OE | input | Output enable for buffer 3, active low: 3Y is disabled to high impedance when 3OE is low, and OE should be tied to GND through a pulldown resistor to ensure high impedance during power up or power down. |
| 11 | 4Y | tri_state | 3-state output of buffer 4, driven from 4A when 4OE is high and high impedance when 4OE is low; output voltage is limited to 0 V to VCC. |
| 12 | 4A | input | Data input of buffer 4; input voltage range is 0 V to 3.6 V and unused inputs must be held at VCC or GND. |
| 13 | 4OE | input | Output enable for buffer 4, active low: 4Y is disabled to high impedance when 4OE is low, and OE should be tied to GND through a pulldown resistor to ensure high impedance during power up or power down. |
| 14 | VCC | power_in | Supply voltage, 1.65 V to 3.6 V recommended operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74ALVC126DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74alvc126dr-etched.step/sn74alvc126dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74alvc126dr.step/sn74alvc126dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (18 pp, sha256
1dcb518223ff992f, retrieved 2026-10-08, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).