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Contents

README

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LP38511MR-ADJ

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8-EP

LP38511MR-ADJ from Texas Instruments, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated output voltage pin; pins 1 and 2 share current and must be connected together.
2 OUT power_out Regulated output voltage pin; it shares current with pin 1 and must be connected to it.
3 ADJ input Feedback input to the internal error amplifier that sets the output voltage; ADJ pin survival voltage is -0.3V to +6.0V.
4 N/C unconnected No internal connection.
5 GND power_in Ground pin for the regulator.
6 EN input Enable input: pull high to enable the output and low to disable it; it has no internal bias and must be tied to the input voltage or actively driven, with an enable input voltage range of 0.0V to 5.5V.
7 IN power_in Input supply pin; pins 7 and 8 share current and must be connected together, with an input supply range of 2.25V to 5.5V.
8 IN power_in Input supply pin; it shares current with pin 7 and must be connected to it, with an input supply range of 2.25V to 5.5V.
9 DAP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8-EP
Category Power Management (PMIC)
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VADJ Accuracy (line regulation band) VADJ 495 500 505 mV 2.25V ≤ VIN ≤ 5.5V 3
VADJ Accuracy (load band) VADJ 490 500 510 mV 10 mA ≤ IOUT ≤ 800 mA 3
Dropout Voltage VDO 260 mV IOUT = 800 mA 3
Enable ON Voltage Threshold VEN(ON) 0.9 1.2 1.5 V VEN rising from <0.5V until VOUT = ON; TJ = 25°C 4
Enable ON Voltage Threshold VEN(ON) 0.8 1.6 V VEN rising from <0.5V until VOUT = ON; TJ = -40°C to +125°C 4
Enable OFF Voltage Threshold VEN(OFF) 0.6 1 1.4 V VEN falling from 1.6V until VOUT = OFF; TJ = 25°C 4
Enable OFF Voltage Threshold VEN(OFF) 0.5 1.5 V VEN falling from 1.6V until VOUT = OFF; TJ = -40°C to +125°C 4
Storage Temperature Range -65 150 °C 3
Soldering Temperature (SO PowerPad) 260 °C SO PowerPad, 10 s 3
ESD Rating -2 2 kV Human body model 3
Input Pin Voltage (Survival) -0.3 6 V 3
Enable Pin Voltage (Survival) -0.3 6 V 3
Output Pin Voltage (Survival) -0.3 6 V 3
ADJ Pin Voltage (Survival) -0.3 6 V 3
Input Supply Voltage VIN 2.25 5.5 V 3
Output Voltage VOUT 5 V Range VADJ to 5V 3
Enable Input Voltage VEN 0 5.5 V 3
Output Current (DC) IOUT 1 800 mA 3
Junction Temperature TJ -40 125 °C 3
Thermal Resistance Junction to Ambient (SO PowerPad) θJ-A 168 °C/W SO PowerPad; junction to ambient 4
Thermal Resistance Junction to Case (SO PowerPad) θJ-C 11 °C/W SO PowerPad; junction to case 4

CAD (KiCad official)

  • Symbol: LP38511MR-ADJ
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOIC-8-EP (KiCad packages3D, STEP)
  • 3D model files: lp38511mr-adj-etched.step / lp38511mr-adj-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp38511mr-adj.step / lp38511mr-adj.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 81da2b194ed6a9f4, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF