component
CD4001BPWR
Public Made by Adomby adom
Texas Instruments Logic Gates, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4001BPWR
Texas Instruments · Logic Gates · TSSOP-14
CD4001BPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Input A to the first 2-input NOR gate; its NOR combination with input B (pin 2) drives output J at pin 3. |
| 2 | B | input | Input B to the first 2-input NOR gate; its NOR combination with input A (pin 1) drives output J at pin 3. |
| 3 | J | output | Output of the first NOR gate, J = NOR(A, B) where A and B are pins 1 and 2. |
| 4 | K | output | Output of the second NOR gate, K = NOR(C, D) where C and D are pins 5 and 6. |
| 5 | C | input | Input C to the second 2-input NOR gate; its NOR combination with input D (pin 6) drives output K at pin 4. |
| 6 | D | input | Input D to the second 2-input NOR gate; its NOR combination with input C (pin 5) drives output K at pin 4. |
| 7 | VSS | power_in | Negative supply / ground reference for the device, with DC supply voltage range of -0.5V to +20V referenced to this terminal per absolute maximum ratings. |
| 8 | E | input | Input E to the third 2-input NOR gate; its NOR combination with input F (pin 9) drives output L at pin 10. |
| 9 | F | input | Input F to the third 2-input NOR gate; its NOR combination with input E (pin 8) drives output L at pin 10. |
| 10 | L | output | Output of the third NOR gate, L = NOR(E, F) where E and F are pins 8 and 9. |
| 11 | M | output | Output of the fourth NOR gate, M = NOR(G, H) where G and H are pins 12 and 13. |
| 12 | G | input | Input G to the fourth 2-input NOR gate; its NOR combination with input H (pin 13) drives output M at pin 11. |
| 13 | H | input | Input H to the fourth 2-input NOR gate; its NOR combination with input G (pin 12) drives output M at pin 11. |
| 14 | VDD | power_in | Positive supply voltage input, recommended operating range 3V to 18V (absolute maximum -0.5V to +20V referenced to VSS). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
CD4001BPWR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
cd4001bpwr-etched.step/cd4001bpwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4001bpwr.step/cd4001bpwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (23 pp, sha256
29898c1b5c0da39b, retrieved 2026-09-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-sonnet-5(text+vision), consensusclaude-opus-4-8(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).