component
SN74AHC126QPWRQ1
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74AHC126QPWRQ1
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-14
SN74AHC126QPWRQ1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Channel 1 output enable; when low disables output to high-impedance, when high enables output to follow 1A input. |
| 2 | 1A | input | Channel 1 A input; standard CMOS input buffered to output 1Y. |
| 3 | 1Y | tri_state | Channel 1 Y output; 3-state output, high-impedance when 1OE is low. |
| 4 | 2OE | input | Channel 2 output enable; when low disables output to high-impedance, when high enables output to follow 2A input. |
| 5 | 2A | input | Channel 2 A input; standard CMOS input buffered to output 2Y. |
| 6 | 2Y | tri_state | Channel 2 Y output; 3-state output, high-impedance when 2OE is low. |
| 7 | GND | power_in | Ground connection; provides reference for all internal circuits. |
| 8 | 3Y | tri_state | Channel 3 Y output; 3-state output, high-impedance when 3OE is low. |
| 9 | 3A | input | Channel 3 A input; standard CMOS input buffered to output 3Y. |
| 10 | 3OE | input | Channel 3 output enable; when low disables output to high-impedance, when high enables output to follow 3A input. |
| 11 | 4Y | tri_state | Channel 4 Y output; 3-state output, high-impedance when 4OE is low. |
| 12 | 4A | input | Channel 4 A input; standard CMOS input buffered to output 4Y. |
| 13 | 4OE | input | Channel 4 output enable; when low disables output to high-impedance, when high enables output to follow 4A input. |
| 14 | VCC | power_in | Positive supply voltage; operating range 2 V to 5.5 V per section 6.3 recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74AHC126QPWRQ1 - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ahc126qpwrq1-etched.step/sn74ahc126qpwrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ahc126qpwrq1.step/sn74ahc126qpwrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
fd48c755d326ec92, retrieved 2026-09-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).