AD8330ACPZ-R7 from ADI(亚德诺), in a LFCSP-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VPSI	power_in	Positive supply for the input stages.
2	INHI	input	Differential signal input, positive polarity; the input is rated up to ±2 V peak differential with 1 kΩ differential input resistance.
3	INLO	input	Differential signal input, negative polarity; the input is rated up to ±2 V peak differential with 1 kΩ differential input resistance.
4	MODE	input	Logic input that selects the gain slope; high means gain increases with VDBS, and the logic levels are 1.5 V minimum for mode up and 0.5 V maximum for mode down.
5	VDBS	input	Input for the linear-in-dB gain control voltage, giving 0 dB to 50 dB gain for 0 V to 1.5 V at 30 mV/dB.
6	CMGN	passive	Common baseline for the gain control interfaces, connected to COMM for the normal 0 V to 1.5 V VDBS range.
7	COMM	power_in	Ground for the input and gain control bias circuitry.
8	VMAG	input	Input for gain/amplitude control; it internally defaults to 0.5 V and sets a linear numeric gain factor from 0.03 to 10.
9	CMOP	power_in	Ground for the output stages.
10	OPLO	output	Differential signal output, negative polarity, which can drive single-sided loads essentially rail-to-rail.
11	OPHI	output	Differential signal output, positive polarity, which can drive single-sided loads essentially rail-to-rail.
12	VPSO	power_in	Positive supply for the output stages.
13	CNTR	input	Common-mode output voltage control; it can be driven to within 0.5 V of either ground or VS, and defaults to VS/2 when open.
14	VPOS	power_in	Positive supply for the inner stages.
15	OFST	passive	Internal offset compensation feature; the external capacitor sets the high-pass corner (as low as 5 Hz), the feature is enabled when unconnected, and disabled when grounded.
16	ENBL	input	Power enable, active high.
17	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	ADI(亚德诺)
Package	LFCSP-16(3x3)
Category
Pins	17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply Voltage		2.7		6	V		4
Absolute Maximum Supply Voltage				6	V		5
Logic Voltage for Full Operation		2.3			V		4
Logic Voltage for Full Shutdown				0.5	V		4
Logic Voltage for Hibernate Mode		1.3	1.5	1.7	V	Output pins remain at CNTR	4
Quiescent Current			20	27	mA	VDBS = 0.75 V	4
Current in Full Shutdown			20	100	µA		4
Current in Hibernate Mode				1.5	mA		4
Peak Output Scaling, Gain vs. VMAG		3.8	4	4.2	V/V	See the Circuit Description section	4
Default Voltage VMAG		0.48	0.5	0.52	V	VMAG O/C	4
Gain Scaling		27	30	33	mV/dB	Mode high or low	3
Gain Linearity Error		-0.35		0.35	dB	0.3 V ≤ VDBS ≤ 1.2 V	3
Absolute Gain Error		-2		2	dB	VDBS = 0 V	3
Common-Mode Voltage Level		2.75	3	3.25	V		3
Peak-to-Peak Output Swing		1.8	2	2.2	V		3
Offset Voltage, Offset Correction Enabled		-5		5	mV	Offset Correction Enabled	3
Offset Voltage, Offset Correction Disabled		-40		40	mV	Pin OFST connected to ground	3
Differential Output Impedance		120	150	180	Ω	Pin-to-pin	3
Input Resistance Tolerance		-20		20	%	On-chip input resistance RI, stated in text	16
Output Impedance Tolerance		-20		20	%	Differential output resistance RO, stated in text	16
Storage Temperature Range		-65		150	°C		5
Operating Temperature Range		-40		85	°C		5
Power Dissipation, 16-Lead LFCSP Package				1.67	W		5
Lead Temperature (Soldering)				300	°C	60 sec soldering	5
Thermal Resistance θJA, 16-Lead LFCSP Package	θJA		60		°C/W		5

CAD (KiCad official)

Symbol: AD8330ACPZ-R7
Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
3D model: LFCSP-16(3x3) (KiCad packages3D, STEP)
3D model files: ad8330acpz-r7-etched.step / ad8330acpz-r7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad8330acpz-r7.step / ad8330acpz-r7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: ADI(亚德诺) datasheet (32 pp, sha256 1f0f9ebcbdcc9778, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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AD8330ACPZ-R7

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3D Model

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