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AVR32DB32T-I/PT

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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrolleravr32db32t-ifactory-2.0.0extractor-text

Verified AVR32DB32T-I/PT

by Ray · last 13 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

13 Nov 2026RayPublished by the parts factory: tier mfr, 32 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • •array (skip): not an array of element pairs
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AVR32DB32T-I/PT · TQFP-32(7x7) · 32 pins
  • ✓copper: 32 copper pads, none touching another net
  • ✓datasheet: all 32 pin names found in the 726-page datasheet
  • ✓distributor: lcsc C3225584, digikey 150-AVR32DB32T-I/PTCT-ND, mouser 579-AVR32DB32T-I/PT
  • ✓family: TQFP-32_7x7mm_P0.8mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-eok9jpwl/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.711)
  • ✓pads: 32 pins = 32 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 32 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 45 kB, viewers/symbol.html 23 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ avr32db32t-i-pt.kicad_sym✓ avr32db32t-i-pt.kicad_mod✓ avr32db32t-i-pt.step
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Contents

README

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AVR32DB32T-I

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-32(7x7)

AVR32DB32T-I from Microchip Tech, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA3 bidirectional General-purpose I/O pin PA3 with alternate functions TWI0 SCL (Fm+), USART0 XDIR, TCA0 WO3 and CCL-LUT0 OUT, and it can be used as an event input and for external interrupts.
2 PA4 bidirectional General-purpose I/O pin PA4 with alternate functions USART0 TxD (alternate position), SPI0 MOSI, TCA0 WO4 and TCD0 WOA; it is 5 V-free of any stated limit, so it is operated within the VDD range given in the Electrical Characteristics.
3 PA5 bidirectional General-purpose I/O pin PA5 with alternate functions USART0 RxD (alternate position), SPI0 MISO, TCA0 WO5 and TCD0 WOB.
4 PA6 bidirectional General-purpose I/O pin PA6 with alternate functions USART0 XCK (alternate position), SPI0 SCK, TCD0 WOC and CCL-LUT0 OUT (alternate position).
5 PA7 bidirectional General-purpose I/O pin PA7 with alternate functions CLKOUT, USART0 XDIR (alternate position), SPI0 SS, TCD0 WOD and EVOUTA (alternate position), and it is the default OUT pin for ZCD0 and ZCD1.
6 PC0 bidirectional Multi-voltage I/O pin PC0 on the VDDIO2 power domain, with alternate functions USART1 TxD, SPI0 MOSI (alternate position), TCA0 WO0 (alternate position) and CCL-LUT1 IN0.
7 PC1 bidirectional Multi-voltage I/O pin PC1 on the VDDIO2 power domain, with alternate functions USART1 RxD, SPI0 MISO (alternate position), TCA0 WO1 (alternate position) and CCL-LUT1 IN1.
8 PC2 bidirectional Multi-voltage I/O pin PC2 on the VDDIO2 power domain, with alternate functions TWI0 SDA (Fm+), USART1 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position), EVOUTC and CCL-LUT1 IN2.
9 PC3 bidirectional Multi-voltage I/O pin PC3 on the VDDIO2 power domain, with alternate functions TWI0 SCL (Fm+), USART1 XDIR, SPI0 SS (alternate position), TCA0 WO3 (alternate position) and CCL-LUT1 OUT.
10 VDDIO2 power_in Supply for the multi-voltage I/O pins; it may be at a different voltage from VDD in dual-supply mode, and must rise closely with VDD in single-supply mode.
11 PD1 bidirectional I/O pin PD1 with analog input AIN1, OP0 INP, ZCD ZCIN input, TCA0 WO1 (alternate position) and CCL-LUT2 IN1.
12 PD2 bidirectional I/O pin PD2 with analog input AIN2, AC0 AINP input, OP0 OUT, TCA0 WO2 (alternate position), EVOUTD and CCL-LUT2 IN2.
13 PD3 bidirectional I/O pin PD3 with analog input AIN3, AC0 AINN input, OP0 INN, TCA0 WO3 (alternate position) and CCL-LUT2 OUT.
14 PD4 bidirectional I/O pin PD4 with analog input AIN4, AC input AINP2/AINP1, OP1 INP and TCA0 WO4 (alternate position).
15 PD5 bidirectional I/O pin PD5 with analog input AIN5, AC0 AINN input, OP1 OUT and TCA0 WO5 (alternate position).
16 PD6 bidirectional I/O pin PD6 with analog input AIN6, AC0 AINP3 input and an output function (OUT) from the analog peripherals.
17 PD7 bidirectional I/O pin PD7 that can also serve as the external voltage reference input VREFA, with analog input AIN7, AC2 AINN input, OP1 INN and EVOUTD (alternate position).
18 AVDD power_in Supplies the I/O lines, XOSC32K and the analog peripherals; the same voltage must be applied to all VDD and AVDD pins, and AVDD must ramp closely with VDD at power-up.
19 AGND power_in Analog ground pin listed in the pinout table; the datasheet states that the GND pins are common to VDD, AVDD and VDDIO2.
20 PF0 bidirectional I/O pin PF0 with crystal function XTAL32K1, analog input AIN16 (not usable as a negative differential ADC input), USART2 TxD, TCA0 WO0 (alternate position), TCD0 WOA (alternate position) and CCL-LUT3 IN0.
21 PF1 bidirectional I/O pin PF1 with crystal function XTAL32K2, analog input AIN17 (not usable as a negative differential ADC input), USART2 RxD, TCA0 WO1 (alternate position), TCD0 WOB (alternate position) and CCL-LUT3 IN1.
22 PF2 bidirectional I/O pin PF2 with TWI1 SDA (Fm+), analog input AIN18 (not usable as a negative differential ADC input), USART2 XCK, TCA0 WO2 (alternate position), TCD0 WOC, EVOUTF and CCL-LUT3 IN2.
23 PF3 bidirectional I/O pin PF3 with TWI1 SCL (Fm+), analog input AIN19 (not usable as a negative differential ADC input), USART2 XDIR, TCA0 WO3 (alternate position), TCD0 WOD and CCL-LUT3 OUT.
24 PF4 bidirectional I/O pin PF4 with analog input AIN20 (not usable as a negative differential ADC input), USART2 TxD (alternate position), TCA0 WO4 (alternate position) and a WO output from the timer peripheral.
25 PF5 bidirectional I/O pin PF5 with analog input AIN21 (not usable as a negative differential ADC input), USART2 RxD (alternate position), TCA0 WO5 (alternate position) and a WO output from the timer peripheral.
26 PF6 (RESET) input Input-only pin PF6 that serves as the external RESET pin, which requires a noise filter and is enabled through the RSTPINCFG fuse with pull-up enabled on PF6.
27 UPDI bidirectional Dedicated Unified Program and Debug Interface pin, used for one-wire UART programming and debug communication with no other function.
28 VDD power_in Supplies the I/O lines, XOSCHF and the internal voltage regulator; all VDD pins are internally connected and must carry the same voltage.
29 GND power_in Ground pin; the GND pins are common to VDD, AVDD and VDDIO2.
30 PA0 bidirectional General-purpose I/O pin PA0 with alternate functions XTALHF1 (crystal), EXTCLK, USART0 TxD, TCA0 WO0 and CCL-LUT0 IN0.
31 PA1 bidirectional General-purpose I/O pin PA1 with alternate functions XTALHF2 (crystal), USART0 RxD, TCA0 WO1 and CCL-LUT0 IN1.
32 PA2 bidirectional General-purpose I/O pin PA2 with alternate functions TWI0 SDA (Fm+), USART0 XCK, TCA0 WO2, EVOUTA and CCL-LUT0 IN2.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-32(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage 1.8 5.5 V Ordering table entry for AVR32DB32T-I/PT (Table 41-1); not from the electrical characteristics tables 690
Operating temperature range (Industrial, -I) -40 85 °C Ordering table entry for AVR32DB32T-I/PT; Industrial grade (-I) per part-numbering key 690

CAD (KiCad official)

  • Symbol: AVR32DB32T-I
  • Footprint: Package_QFP:TQFP-32_7x7mm_P0.8mm
  • 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: avr32db32t-i-pt-etched.step / avr32db32t-i-pt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); avr32db32t-i-pt.step / avr32db32t-i-pt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (726 pp, sha256 e12657e9f4c78c56, retrieved 2026-11-13, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF