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ADG1634BCPZ-REEL7

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Analog Devices Analog Switches, Multiplexers, LFCSP-20(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

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ADG1634BCPZ-REEL7

Analog Devices · Analog Switches, Multiplexers · LFCSP-20(4x4)

ADG1634BCPZ-REEL7 from Analog Devices, in a LFCSP-20(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D1 passive Drain Terminal 1; can be an input or an output.
2 S1B passive Source Terminal 1B; can be an input or an output.
3 VSS power_in Most negative power supply potential; in single-supply applications this pin can be connected to ground.
4 GND power_in Ground (0 V) reference.
5 S2B passive Source Terminal 2B; can be an input or an output.
6 D2 passive Drain Terminal 2; can be an input or an output.
7 S2A passive Source Terminal 2A; can be an input or an output.
8 IN2 input Logic control input 2; digital input VINH minimum 2.0 V and VINL maximum 0.8 V.
9 IN3 input Logic control input 3; digital input VINH minimum 2.0 V and VINL maximum 0.8 V.
10 S3A passive Source Terminal 3A; can be an input or an output.
11 D3 passive Drain Terminal 3; can be an input or an output.
12 S3B passive Source Terminal 3B; can be an input or an output.
13 VDD power_in Most positive power supply potential; datasheet specifies VDD/VSS ±3.3 V to ±8 V dual supply or 3.3 V to 16 V single supply.
14 S4B passive Source Terminal 4B; can be an input or an output.
15 D4 passive Drain Terminal 4; can be an input or an output.
16 S4A passive Source Terminal 4A; can be an input or an output.
17 IN4 input Logic control input 4; digital input VINH minimum 2.0 V and VINL maximum 0.8 V.
18 EN input Active low digital input: when high the device is disabled and all switches are off, and when low the INx inputs determine the on switches.
19 IN1 input Logic control input 1; digital input VINH minimum 2.0 V and VINL maximum 0.8 V.
20 S1A passive Source Terminal 1A; can be an input or an output.
21 EP power_in Exposed pad, tied to the substrate, VSS; connect to VSS.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package LFCSP-20(4x4)
Category Interface
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
On Resistance (RON) max, ±5 V dual supply RON 8 Ω VDD = ±4.5 V, VSS = ±4.5 V 3
On-Resistance Match Between Channels (ΔRON) max, ±5 V ΔRON 0.35 Ω VS = ±4.5 V, IS = −10 mA 3
On-Resistance Flatness (RFLAT(ON)) max, ±5 V RFLAT(ON) 2 Ω VS = ±4.5 V, IS = −10 mA 3
Source Off Leakage IS(Off) max, ±5 V IS(Off) -12 12 nA VS = ±4.5 V, VD = ±4.5 V; see Figure 27 3
Drain Off Leakage ID(Off) max, ±5 V ID(Off) -20 20 nA VS = ±4.5V, VD = ±4.5 V; see Figure 27 3
Channel On Leakage ID, IS(On) max, ±5 V ID, IS(On) -20 20 nA VS = VD = ±4.5 V; see Figure 28 3
VDD/VSS supply range, dual supply VDD/VSS 3.3 8 V Printed as ±3.3/±8 V min/max 3
Transition Time max, ±5 V tTRANSITION 264 ns VS = 2.5 V; see Figure 29 3
Enable Turn-On Time tON(EN) max, ±5 V tON(EN) 98 ns VS = 2.5 V; see Figure 31 3
Enable Turn-Off Time tOFF(EN) max, ±5 V tOFF(EN) 259 ns VS = 2.5 V; see Figure 31 3
Break-Before-Make Time Delay tD min, ±5 V tD 30 ns VS1 = VS2 = 2.5 V; see Figure 30 3
Positive supply current IDD max, ±5 V IDD 1 µA Digital inputs = 0 V or VDD 3
On Resistance (RON) max, 12 V single supply RON 7.5 Ω VDD = 10.8 V, VSS = 0 V 4
On-Resistance Match Between Channels (ΔRON) max, 12 V ΔRON 0.35 Ω VS = 10 V, IS = −10 mA 4
On-Resistance Flatness (RFLAT(ON)) max, 12 V RFLAT(ON) 1.9 Ω VS = 0 V to 10 V, IS = −10 mA 4
Source Off Leakage IS(Off) max, 12 V IS(Off) -12 12 nA VS = 1 V/10 V, VD = 10 V/1 V; see Figure 27 4
Drain Off Leakage ID(Off) max, 12 V ID(Off) -20 20 nA VS = 1 V/10 V, VD = 10 V/1 V; see Figure 27 4
Channel On Leakage ID, IS(On) max, 12 V ID, IS(On) -20 20 nA VS = VD = 1 V or 10 V; see Figure 28 4
Transition Time max, 12 V tTRANSITION 205 ns VS = 8 V; see Figure 29 4
Enable Turn-On Time tON(EN) max, 12 V tON(EN) 47 ns VS = 8 V; see Figure 31 4
Enable Turn-Off Time tOFF(EN) max, 12 V tOFF(EN) 200 ns VS = 8 V; see Figure 31 4
Break-Before-Make Time Delay tD min, 12 V tD 30 ns VS1 = VS2 = 8 V; see Figure 30 4
Positive supply current IDD max, 12 V IDD 1 µA Digital inputs = 0 V or VDD 4
Positive supply current IDD max, 12 V, LFCSP IDD 600 µA Digital inputs = 5 V; LFCSP 4
VDD single-supply range VDD 3.3 16 V Printed as 3.3/16 V min/max 4
On Resistance (RON) max, 5 V single supply RON 14 Ω VDD = 4.5 V, VSS = 0 V 5
On-Resistance Match Between Channels (ΔRON) max, 5 V ΔRON 0.4 Ω VS = 0 V to 4.5 V, IS = −10 mA 5
On-Resistance Flatness (RFLAT(ON)) max, 5 V RFLAT(ON) 3 Ω VS = 0 V to 4.5 V, IS = −10 mA 5
Source Off Leakage IS(Off) max, 5 V IS(Off) -12 12 nA VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 27 5
Drain Off Leakage ID(Off) max, 5 V ID(Off) -20 20 nA VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 27 5
Channel On Leakage ID, IS(On) max, 5 V ID, IS(On) -20 20 nA VS = VD = 1 V or 4.5 V; see Figure 28 5
Transition Time max, 5 V tTRANSITION 337 ns VS = 2.5 V; see Figure 29 5
Enable Turn-On Time tON(EN) max, 5 V tON(EN) 110 ns VS = 2.5 V; see Figure 31 5
Enable Turn-Off Time tOFF(EN) max, 5 V tOFF(EN) 333 ns VS = 2.5 V; see Figure 31 5
Break-Before-Make Time Delay tD min, 5 V tD 37 ns VS1 = VS2 = 2.5 V; see Figure 30 5
Positive supply current IDD max, 5 V IDD 1 µA Digital inputs = 0 V or VDD 5
Source Off Leakage IS(Off) max, 3.3 V IS(Off) -12 12 nA VS = 0.6 V/3 V, VD = 3 V/0.6 V; see Figure 27 6
Drain Off Leakage ID(Off) max, 3.3 V ID(Off) -20 20 nA VS = 0.6 V/3 V, VD = 3 V/0.6 V; see Figure 27 6
Channel On Leakage ID, IS(On) max, 3.3 V ID, IS(On) -20 20 nA VS = VD = 0.6 V or 3 V; see Figure 28 6
Transition Time max, 3.3 V tTRANSITION 508 ns VS = 1.5 V; see Figure 29 6
Enable Turn-On Time tON(EN) max, 3.3 V tON(EN) 210 ns VS = 1.5 V; see Figure 31 6
Enable Turn-Off Time tOFF(EN) max, 3.3 V tOFF(EN) 509 ns VS = 1.5 V; see Figure 31 6
Break-Before-Make Time Delay tD min, 3.3 V tD 48 ns VS1 = VS2 = 1.5 V; see Figure 30 6
Positive supply current IDD max, 3.3 V IDD 1 µA Digital inputs = 0 V or VDD 6
Input High Voltage VINH min VINH 2 V 3
Input Low Voltage VINL max VINL 0.8 V 3
Input Current IINL or IINH max IINL, IINH -0.1 0.1 µA VIN = VGND or VDD 3
Continuous current S or D, LFCSP, VDD = +5 V, VSS = −5 V, 25°C 220 mA LFCSP (θJA = 30.4°C/W); VDD = +5 V, VSS = −5 V 7
Continuous current S or D, LFCSP, VDD = 12 V, VSS = 0 V, 25°C 234 mA LFCSP (θJA = 30.4°C/W); VDD = 12 V, VSS = 0 V 7
Continuous current S or D, LFCSP, VDD = 5 V, VSS = 0 V, 25°C 171 mA LFCSP (θJA = 30.4°C/W); VDD = 5 V, VSS = 0 V 7
Continuous current S or D, LFCSP, VDD = 3.3 V, VSS = 0 V, 25°C 140 mA LFCSP (θJA = 30.4°C/W); VDD = 3.3 V, VSS = 0 V 7
VDD to VSS VDD − VSS 18 V 8
VDD to GND VDD − GND -0.3 18 V 8
VSS to GND VSS − GND -18 0.3 V 8
Peak Current, S or D 450 mA pulsed at 1 ms, 10% duty cycle maximum 8
Operating Temperature Range (Industrial, Y Version) -40 125 °C Y version 8
Storage Temperature Range -65 150 °C 8
Junction Temperature 150 °C 8
Reflow Soldering Peak Temperature, Pb free 260 °C Pb free 8
Thermal Impedance θJA, 20-lead LFCSP 4 mm × 4 mm θJA 30.4 °C/W 0 airflow, 4-layer board 8

CAD (KiCad official)

  • Symbol: ADG1634BCPZ-REEL7
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: LFCSP-20(4x4) (KiCad packages3D, STEP)
  • 3D model files: adg1634bcpz-reel7-etched.step / adg1634bcpz-reel7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adg1634bcpz-reel7.step / adg1634bcpz-reel7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (19 pp, sha256 fd9adc336adf693b, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF