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CH32L103C8T6
Public Made by Adomby adom
WCH Jiangsu Qin Heng Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCH32L103C8T6
WCH Jiangsu Qin Heng · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
CH32L103C8T6 from WCH Jiangsu Qin Heng, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Optional backup supply, 1.8-3.6 V and not higher than VDD, that powers the RTC, LSE and backup registers when VDD is off; keep the VBAT trace as short as possible. |
| 2 | PC13 (TAMPER-RTC) | bidirectional | Backup-domain I/O: with VDD present it can be a GPIO, TAMPER input, RTC calibration/alarm or second output, but the backup switch supplies only about 3 mA and as an output it is limited to 2 MHz, 30 pF load and cannot drive LEDs. |
| 3 | PC14 (OSC32_IN) | bidirectional | Backup-domain I/O usable as GPIO or LSE oscillator input (OSC32_IN) when VDD is present; the backup switch supplies only about 3 mA and as an output it is limited to 2 MHz, 30 pF load and cannot drive LEDs. |
| 4 | PC15 (OSC32_OUT) | bidirectional | Backup-domain I/O usable as GPIO or LSE oscillator output (OSC32_OUT) when VDD is present; the backup switch supplies only about 3 mA and as an output it is limited to 2 MHz, 30 pF load and cannot drive LEDs. |
| 5 | OSC_IN/PD0 | bidirectional | High-speed oscillator input (HSE, 3-25 MHz) that is the default function after reset on this package; software can reconfigure it as PD0 GPIO. |
| 6 | OSC_OUT/PD1 | bidirectional | High-speed oscillator output (HSE) that is the default function after reset on this package; software can reconfigure it as PD1 GPIO. |
| 7 | NRST | input | Active-low external reset input with internal pull-up of 30-50 kΩ (40 kΩ typical); pulses below 100 ns are filtered and pulses above 300 ns are not filtered. |
| 8 | VSSA | power_in | Analog ground for the HSI RC oscillator, ADC, temperature sensor and PLL analog section; must be within 50 mV of the other VSS pins. |
| 9 | VDDA | power_in | Analog supply of 2.0-3.6 V for the HSI RC oscillator, ADC, temperature sensor and PLL, not higher than VDD in normal operation and at least 2.4 V when the ADC is used. |
| 10 | PA0-WKUP | bidirectional | Analog-capable I/O (not marked 5 V tolerant) with WKUP wake-up, ADC_IN0 and OPA_P4 functions. |
| 11 | PA1 | bidirectional | Analog-capable I/O (not marked 5 V tolerant) with ADC_IN1, OPA_N4, TIM2_CH2 and USART2_RTS functions. |
| 12 | PA2 | bidirectional | Analog-capable I/O (not marked 5 V tolerant) with ADC_IN2, CMP1_P0, OPA_O2, TIM2_CH3 and USART2_TX functions. |
| 13 | PA3 | bidirectional | Analog-capable I/O (not marked 5 V tolerant) with ADC_IN3, OPA_O0, TIM2_CH4 and USART2_RX functions. |
| 14 | PA4 | bidirectional | Analog-capable I/O (not marked 5 V tolerant) with ADC_IN4, OPA_O3, SPI1_NSS, USART2_CK and TIM2_CH4_7 functions. |
| 15 | PA5 | bidirectional | Analog-capable I/O (not marked 5 V tolerant) with ADC_IN5, SPI1_SCK, OPA_N3, TIM2_CH3_7 and USART1_TX_3 functions. |
| 16 | PA6 | bidirectional | Analog-capable I/O (not marked 5 V tolerant) with ADC_IN6, SPI1_MISO, TIM3_CH1, OPA_N1/OPA_P5 and TIM1_BKIN_1 functions. |
| 17 | PA7 | bidirectional | Analog-capable I/O (not marked 5 V tolerant) with ADC_IN7, SPI1_MOSI, TIM3_CH2, OPA_N5/OPA_P3 and TIM1_CH1N_1 functions. |
| 18 | PB0 | bidirectional | Analog-capable I/O (not marked 5 V tolerant) with ADC_IN8, TIM3_CH3, USART4_TX, CMP1_OUT0 and OPA_P1/OPA_O4 functions. |
| 19 | PB1 | bidirectional | Analog-capable I/O (not marked 5 V tolerant) with ADC_IN9, TIM3_CH4, USART4_RX, CMP1_N0 and OPA_O1 functions. |
| 20 | PB2/BOOT1 | bidirectional | 5 V tolerant (FT) I/O whose default function is BOOT1, used together with BOOT0 to select the boot mode at startup, with USART4_CK, CMP1_P1 and LPT_OUT_1 as alternate functions. |
| 21 | PB10 | bidirectional | 5 V tolerant (FT) I/O with USART3_TX, I2C2_SCL, CMP1_OUT1, CMP3_P1, OPA_N2 and TIM4_CH1_1 functions. |
| 22 | PB11 | bidirectional | 5 V tolerant (FT) I/O with USART3_RX, I2C2_SDA, CMP2_OUT1, CMP3_N1, OPA_N0 and TIM1_CH1N_2 functions. |
| 23 | VSS | power_in | Digital ground; must be within 50 mV of the other VSS pins. |
| 24 | VDD | power_in | Digital supply of 1.8-3.6 V (3.0 V minimum when USB is used), must be within 50 mV of the other VDD pins and not below VDDA in normal operation. |
| 25 | PB12 | bidirectional | 5 V tolerant (FT) I/O with TIM1_BKIN, LPTIM_CH1, USART3_CK, I2C2_SMBA, SPI2_NSS and CMP3_OUT1 functions. |
| 26 | PB13 | bidirectional | 5 V tolerant (FT) I/O with TIM1_CH1N, LPTIM_CH2, USART3_CTS and SPI2_SCK functions. |
| 27 | PB14 | bidirectional | 5 V tolerant (FT) I/O with TIM1_CH2N, LPTIM_ETR, USART3_RTS, SPI2_MISO and OPA_P2 functions. |
| 28 | PB15 | bidirectional | 5 V tolerant (FT) I/O with TIM1_CH3N, LPTIM_OUT, SPI2_MOSI and OPA_P0 functions. |
| 29 | PA8 | bidirectional | 5 V tolerant (FT) I/O with MCO, TIM1_CH1 and USART1_CK functions. |
| 30 | PA9 | bidirectional | 5 V tolerant (FT) I/O with TIM1_CH2 and USART1_TX functions. |
| 31 | PA10 | bidirectional | 5 V tolerant (FT) I/O with TIM1_CH3 and USART1_RX functions. |
| 32 | PA11 | bidirectional | 5 V tolerant (FT) I/O with TIM1_CH4, USART1_CTS, CAN_RX and USB D- (USBDM) functions. |
| 33 | PA12 | bidirectional | 5 V tolerant (FT) I/O with USART1_RTS, CAN_TX and USB D+ (USBDP) functions. |
| 34 | PA13/SWDIO | bidirectional | 5 V tolerant (FT) I/O whose default function is the serial-wire debug data line SWDIO, with TIM1_ETR_5, USART1_RTS_2 and I2C1_SCL_2 as alternates. |
| 35 | VSS | power_in | Digital ground; must be within 50 mV of the other VSS pins. |
| 36 | VDD | power_in | Digital supply of 1.8-3.6 V (3.0 V minimum when USB is used), must be within 50 mV of the other VDD pins. |
| 37 | PA14/SWCLK | bidirectional | 5 V tolerant (FT) I/O whose default function is the serial-wire debug clock SWCLK, with TIM1_CH3_2, TIM1_CH1N_4 and USART1_CTS_4 as alternates. |
| 38 | PA15 | bidirectional | 5 V tolerant (FT) I/O with TIM2_CH1_ETR_1, SPI1_NSS_1 and USART4_RTS_1 functions. |
| 39 | PB3 | bidirectional | 5 V tolerant (FT) I/O with analog-capable function, CMP1_N1, CMP2_N0, CMP3_N0, SPI1_SCK_1, TIM2_CH2_1 and USART4_CTS functions. |
| 40 | PB4 | bidirectional | 5 V tolerant (FT) I/O with analog-capable function, CMP3_OUT0, SPI1_MISO_1, TIM3_CH1_1 and USART4_RTS functions. |
| 41 | PB5 | bidirectional | 5 V tolerant (FT) I/O with analog-capable function, I2C1_SMBA, CMP2_OUT0, CMP3_P0, LPTIM_CH1_1, TIM3_CH2_1 and USART4_RX_1 functions. |
| 42 | PB6 | bidirectional | 5 V tolerant (FT) I/O with I2C1_SCL, CC1 (USB Type-C CC1), CMP2_P1, TIM4_CH1, USART1_TX_1 and SPI1_SCK_2 functions. |
| 43 | PB7 | bidirectional | 5 V tolerant (FT) I/O with I2C1_SDA, CC2 (USB Type-C CC2), CMP2_N1, TIM4_CH2, USART1_RX_1 and SPI1_MOSI_2 functions. |
| 44 | BOOT0 | input | Boot-mode select input sampled at startup together with BOOT1 to choose main Flash, system memory or SRAM boot. |
| 45 | PB8 | bidirectional | 5 V tolerant (FT) I/O with TIM4_CH3, CMP2_P0, CAN_RX_2, SPI1_MISO_2, USART1_RTS_3 and TIM1_CH2_4 functions. |
| 46 | PB9 | bidirectional | 5 V tolerant (FT) I/O with TIM4_CH4, USART1_RX_4, I2C1_SCL_3, CAN_TX_2 and TIM1_CH3N_2 functions. |
| 47 | VSS | power_in | Digital ground; must be within 50 mV of the other VSS pins. |
| 48 | VDD | power_in | Digital supply of 1.8-3.6 V (3.0 V minimum when USB is used), must be within 50 mV of the other VDD pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WCH Jiangsu Qin Heng |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating ambient temperature (TA) | TA | -40 | 85 | ℃ | 31 | ||
| Storage ambient temperature (TS) | TS | -40 | 125 | ℃ | 31 | ||
| External main supply voltage incl. VDDA and VDD | VDD | -0.3 | 4 | V | CH32L103; includes VDDA and VDD | 31 | |
| Input voltage on FT (5V-tolerant) pins | VIN | -0.3 | 5.5 | V | FT pins; minimum printed as VSS-0.3 | 31 | |
| Input voltage on other pins | VIN | -0.3 | V | other pins; printed as VSS-0.3 to VDD+0.3, upper limit not numeric | 31 | ||
| Voltage difference between main supply VDD pins | /ΔVDD_x/ | 50 | mV | between VDD pins of main supply | 31 | ||
| Voltage difference between different ground VSS pins | /ΔVSS_x/ | 50 | mV | between different VSS pins | 31 | ||
| ESD voltage, general I/O pins (HBM) | VESD(HBM) | 4 | KV | general I/O pins, HBM; printed as 4K V | 31 | ||
| ESD voltage, USB pins (HBM) | VESD(HBM) | 4 | KV | USB pins, HBM; printed as 4K V | 31 | ||
| Total current through VDD/VDDA supply lines | IVDD | 150 | mA | supply current through VDD/VDDA power lines | 31 | ||
| Total current through VSS ground lines | IVSS | 150 | mA | outflowing current through VSS ground lines | 31 | ||
| Sink current on any I/O and control pin | IIO | 25 | mA | sink current on any I/O and control pin | 31 |
CAD (KiCad official)
- Symbol:
CH32L103C8T6 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
ch32l103c8t6-etched.step/ch32l103c8t6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ch32l103c8t6.step/ch32l103c8t6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WCH Jiangsu Qin Heng datasheet (57 pp, sha256
9a3e68ea835863d2, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).