TP181C50S5
Public Unreviewedby Ray
TECH PUBLIC Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownTP181C50S5
TECH PUBLIC · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TP181C50S5 from TECH PUBLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power supply input. Absolute maximum -0.3 to +20 V; recommended operating range up to 18 V. Bypass with a 1 µF (1-10 µF) ceramic capacitor to GND close to the pin. |
| 2 | GND | power_in | Ground / return reference for the regulator. |
| 3 | CE | input | Chip enable input. VCEH >= 1.3 V enables the regulator; VCEL <= 0.7 V disables it and engages the internal ~500 Ω output auto-discharge path. Absolute maximum GND-0.3 V to VIN+0.3 V. Do not leave floating. |
| 4 | NC | unconnected | No internal connection. Leave floating or tie to GND. |
| 5 | VOUT | power_out | Regulated 5.0 V output (4.9 V min / 5.1 V max at VIN=6.0 V, IOUT=30 mA). Delivers up to 300 mA with 120 mV typical dropout at 100 mA. Bypass with a 1 µF (1-10 µF) ceramic capacitor to GND; X5R/X7R recommended. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-23-5 |
| Category | PMIC |
| Pins | 5 |
Ordering variants
Same part, different packaging or reel option.
TP181C50S5T3TP181C50S5S3LTP181C50S5TP181C50S5D6
CAD (KiCad official)
- Symbol:
TP181C50S5 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
tp181c50s5.step |
85 KB | You want the bare part, or you mark your own boards. |
tp181c50s5-etched.step |
2.1 MB | You want the part with TP181C50S5 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 507 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TECH PUBLIC datasheet (9 pp, sha256
55e6b532728cc428, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).