component
MS5614T
Public Made by Adomby adom
Hangzhou Ruimeng Tech Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownMS5614T
Hangzhou Ruimeng Tech · Digital To Analog Converters (DAC) · TSSOP-16
MS5614T from Hangzhou Ruimeng Tech, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVDD | power_in | Digital power supply; the datasheet limits the AVDD-to-DVDD difference to -2.8 V to +2.8 V (absolute maximum) and gives a digital supply of 2.7 V to 5.5 V in the recommended conditions. |
| 2 | PD | input | Power-down pin; when driven low the chip is shut down. |
| 3 | LDAC | input | When LDAC is high the DAC outputs are not updated; when LDAC is low the DAC outputs are updated. |
| 4 | DIN | input | Serial data input; 16-bit words (4 control bits plus 12 data bits) are shifted in MSB first on the falling edge of SCLK. |
| 5 | SCLK | input | Serial digital clock input, rated up to 20 MHz, with minimum high and low widths of 25 ns. |
| 6 | CS | input | Chip select, active low; the serial interface is only active while CS is low, allowing several devices on one serial bus. |
| 7 | FS | input | Frame synchronization input; serial data is clocked in on its falling edge and the internal DAC updates after 16 bits are transferred or when FS goes high. |
| 8 | DGND | power_in | Digital ground. |
| 9 | AGND | power_in | Analog ground; the datasheet recommends a 0.1 uF ceramic bypass between VDD and AGND placed as close to the chip as possible. |
| 10 | REFINCD | input | Reference voltage input for channels C and D; the input range is 0 V to AVDD-1.5 V, and exceeding AVDD/2 causes output saturation at large codes. |
| 11 | OUTD | output | Analog output of channel D, swinging from 0 V to AVDD-0.4 V with a 10 kΩ load. |
| 12 | OUTC | output | Analog output of channel C, swinging from 0 V to AVDD-0.4 V with a 10 kΩ load. |
| 13 | OUTB | output | Analog output of channel B, swinging from 0 V to AVDD-0.4 V with a 10 kΩ load. |
| 14 | OUTA | output | Analog output of channel A, swinging from 0 V to AVDD-0.4 V with a 10 kΩ load. |
| 15 | REFINAB | input | Reference voltage input for channels A and B; the input range is 0 V to AVDD-1.5 V, and exceeding AVDD/2 causes output saturation at large codes. |
| 16 | AVDD | power_in | Analog power supply; the datasheet gives 4.5 V to 5.5 V for 5 V operation and 2.7 V to 3.3 V for 3 V operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Hangzhou Ruimeng Tech |
| Package | TSSOP-16 |
| Category | Data Acquisition |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Analog supply voltage AVDD | AVDD | -0.3 | 7 | V | 4 | ||
| Digital supply voltage DVDD | DVDD | -0.3 | 7 | V | 4 | ||
| Supply voltage difference AVDD to DVDD | -2.8 | 2.8 | V | 4 | |||
| Digital input voltage range | VIN | -0.3 | V | 4 | |||
| Reference input voltage range | VREFIN | -0.3 | V | 4 | |||
| Operating temperature range | TA | -40 | 105 | ℃ | 4 | ||
| Storage temperature range | Tstg | -65 | 150 | ℃ | 4 | ||
| Maximum junction temperature | Jt | 150 | ℃ | 4 | |||
| Soldering temperature | 260 | ℃ | 10s | 4 | |||
| Supply voltage, 5V supply | 4.5 | 5 | 5.5 | V | 5V 供电 | 4 | |
| Supply voltage, 3V supply | 2.7 | 3 | 3.3 | V | 3V 供电 | 4 | |
| Digital input high voltage | VIH | 2 | V | DVDD＝2.7V | 4 | ||
| Digital input high voltage | VIH | 2.4 | V | DVDD＝5.5V | 4 | ||
| Digital input low voltage | VIL | 0.6 | V | DVDD＝2.7V | 4 | ||
| Digital input low voltage | VIL | 1 | V | DVDD＝5.5V | 4 | ||
| Reference voltage, 5V supply | 0 | 2.048 | V | 5V 供电（见注 1） | 4 | ||
| Reference voltage, 3V supply | 0 | 1.024 | V | 3V 供电（见注 1） | 4 | ||
| Load resistance | 2 | 10 | KΩ | 4 | |||
| Load capacitance | 100 | pF | 4 | ||||
| SCLK rate | 20 | MHz | 4 | ||||
| Differential nonlinearity (DNL), typical | DNL | 1.5 | LSB | 见注 2 | 5 | ||
| Differential nonlinearity (DNL) | DNL | -4 | 4 | LSB | 见注 2 | 5 | |
| Integral nonlinearity (INL), typical | INL | 0.5 | LSB | 见注 3 | 5 | ||
| Integral nonlinearity (INL) | INL | -1 | 1 | LSB | 见注 3 | 5 | |
| Zero-scale offset error | -12 | 12 | mV | 见注 4 | 5 | ||
| Zero-scale offset temperature coefficient | 10 | ppm/℃ | 见注 5 | 5 | |||
| Gain error | -0.6 | 0.6 | %of FS | 见注 6 | 5 | ||
| Gain error temperature coefficient | 10 | ppm/℃ | 见注 7 | 5 | |||
| PSRR, zero-scale | PSRR | -80 | dB | 零点; 见注 8 和注 9 | 5 | ||
| PSRR, full-scale | PSRR | -80 | dB | 满幅 | 5 | ||
| Output voltage | 0 | V | RL＝10K Ω | 5 | |||
| Output load regulation accuracy | 0.1 | 0.25 | %of FS | RL＝2KΩ到10KΩ | 5 | ||
| Reference input voltage range | 0 | V | 见注 10 | 5 | |||
| Reference input resistance | 10 | MΩ | 6 | ||||
| Reference feedthrough | -75 | dB | REFIN = 1Vpp（1 kHz） + 1.024 V（见注 11） | 6 | |||
| Reference input bandwidth, large signal, slow | 0.5 | MHz | REFIN = 0.2Vpp+ 1.024 V（大信号）; 慢速 | 6 | |||
| Reference input bandwidth, large signal, fast | 1 | MHz | REFIN = 0.2Vpp+ 1.024 V（大信号）; 快速 | 6 | |||
| Digital input high current | -1 | 1 | uA | VI＝VDD | 6 | ||
| Digital input low current | -1 | 1 | uA | VI＝0V | 6 | ||
| Digital input capacitance | 3 | pF | 6 | ||||
| Supply current, 5V supply, slow | 1.6 | 2.4 | mA | 5V 供电，无负载，加 CLOCK，所有输入接 0V 或 VDD; 慢速 | 6 | ||
| Supply current, 5V supply, fast | 3.8 | 5.6 | mA | 5V 供电，无负载，加 CLOCK，所有输入接 0V 或 VDD; 快速 | 6 | ||
| Supply current, 3V supply, slow | 1.2 | 1.6 | mA | 3V 供电，无负载，加 CLOCK，所有输入接 0V 或 VDD; 慢速 | 6 | ||
| Supply current, 3V supply, fast | 3.2 | 4.8 | mA | 3V 供电，无负载，加 CLOCK，所有输入接 0V 或 VDD; 快速 | 6 | ||
| Power-down current | 10 | nA | 6 | ||||
| Slew rate, fast | SR | 5 | V/us | CL＝100pF，RL＝10KΩ，Vo＝10%到 90%，Vref＝2.048，1.024; 快速 | 6 | ||
| Slew rate, slow | SR | 1 | V/us | CL＝100pF，RL＝10KΩ，Vo＝10%到 90%，Vref＝2.048，1.024; 慢速 | 6 | ||
| Settling time to ±0.5LSB, fast | Ts | 3 | 5.5 | V/us | 到±0.5LSB，CL＝100pF，RL＝10KΩ; 快速 | 6 | |
| Settling time to ±0.5LSB, slow | Ts | 9 | 20 | V/us | 到±0.5LSB，CL＝100pF，RL＝10KΩ; 慢速 | 6 | |
| Settling time Ts(c) to ±0.5LSB, fast | Ts（c） | 1 | us | 到±0.5LSB，CL＝100pF，RL＝10KΩ; 快速 | 6 | ||
| Settling time Ts(c) to ±0.5LSB, slow | Ts（c） | 2 | us | 到±0.5LSB，CL＝100pF，RL＝10KΩ; 慢速 | 6 | ||
| Glitch energy | 10 | nV-sec | 从 7FF 到 800 | 6 | |||
| SNR | SNR | 74 | dB | Vref＝1.024 在 3V；Vref＝2.048 在 | 6 | ||
| S/(N+D) | S/(N+D) | 66 | 5V，fs＝400KSPS，fout＝1.1KHz 正弦波，CL＝100pF，RL＝10KΩ，BW ＝20KHz | 7 | |||
| THD | THD | -68 | 5V，fs＝400KSPS，fout＝1.1KHz 正弦波，CL＝100pF，RL＝10KΩ，BW ＝20KHz | 7 | |||
| SFDR | SFDR | 70 | 5V，fs＝400KSPS，fout＝1.1KHz 正弦波，CL＝100pF，RL＝10KΩ，BW ＝20KHz | 7 |
CAD (KiCad official)
- Symbol:
MS5614T - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
ms5614t-etched.step/ms5614t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ms5614t.step/ms5614t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Hangzhou Ruimeng Tech datasheet (15 pp, sha256
2e15d79c1ea33c81, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).