component
MCP6V28-E
Public Made by Adomby adom
Microchip Tech Precision OpAmps, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownMCP6V28-E
Microchip Tech · Precision OpAmps · SOIC-8
MCP6V28-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection. |
| 2 | VIN- | power_in | Inverting input of the op amp, a high-impedance CMOS input with low bias current. |
| 3 | VIN+ | power_in | Non-inverting input of the op amp, a high-impedance CMOS input with low bias current. |
| 4 | VSS | power_in | Negative power supply, typically connected to ground in single-supply use. |
| 5 | NC | unconnected | No internal connection. |
| 6 | VOUT | output | Op amp output, a low-impedance voltage source. |
| 7 | VDD | power_in | Positive power supply, 2.3V to 5.5V above VSS, and needs bypass capacitors. |
| 8 | CS | input | Chip Select, a CMOS Schmitt-triggered digital input that places the MCP6V28 into a low power mode. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Amplifiers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -2 | 2 | µV | TA = +25°C (Note 1) | 3 | |
| Input Offset Voltage Drift with Temperature (linear) | TC1 | -50 | 50 | nV/°C | TA = -40 to +125°C (Note 1) | 3 | |
| Power Supply Rejection | PSRR | 125 | 142 | dB | (Note 1) | 3 | |
| Input Bias Current across Temperature | IB | 1.2 | 5 | nA | TA = +125°C | 3 | |
| Common-Mode Input Voltage Range Low | VCML | -0.15 | V | VSS − 0.15 V (Note 2) | 4 | ||
| Common-Mode Input Voltage Range High | VCMH | 0.2 | V | VDD + 0.2 V (Note 2) | 4 | ||
| Common-Mode Rejection | CMRR | 120 | 136 | dB | VDD = 2.3V, VCM = -0.15V to 2.5V (Note 1, Note 2) | 4 | |
| Common-Mode Rejection | CMRR | 125 | 142 | dB | VDD = 5.5V, VCM = -0.15V to 5.7V (Note 1, Note 2) | 4 | |
| DC Open-Loop Gain (large signal) | AOL | 125 | 147 | dB | VDD = 2.3V, VOUT = 0.2V to 2.1V (Note 1) | 4 | |
| DC Open-Loop Gain (large signal) | AOL | 133 | 155 | dB | VDD = 5.5V, VOUT = 0.2V to 5.3V (Note 1) | 4 | |
| Minimum Output Voltage Swing | VOL | 5 | 15 | mV | G = +2, 0.5V input overdrive; relative to VSS | 4 | |
| Maximum Output Voltage Swing | VOH | -15 | -5 | mV | G = +2, 0.5V input overdrive; relative to VDD | 4 | |
| Supply Voltage | VDD | 2.3 | 5.5 | V | 4 | ||
| Quiescent Current per amplifier | IQ | 450 | 620 | 800 | µA | IO = 0 | 4 |
| POR Trip Voltage | VPOR | 1.15 | 1.65 | V | 4 | ||
| CS Logic Threshold, Low | VIL | 0 | 0.3 | V | VSS to 0.3VDD | 6 | |
| CS Logic Threshold, High | VIH | 0.7 | 1 | V | 0.7VDD to VDD | 6 | |
| CS Pull-Down Resistor | RPD | 3 | 5 | MΩ | 6 | ||
| CS Low to Amplifier Output On Turn-on Time | tON | 4 | 50 | µs | CS Low = VSS+0.3 V, G = +1 V/V, VOUT = 0.9 VDD/2 | 6 | |
| Specified Temperature Range | TA | -40 | 125 | °C | 6 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | (Note 1) | 6 | |
| Storage Temperature Range | TA | -65 | 150 | °C | 6 | ||
| Current at Input Pins | -2 | 2 | mA | 3 | |||
| Analog Inputs (VIN+ and VIN-) | -1 | 1 | V | VSS, 1.0V to VDD+1.0V | 3 | ||
| All other Inputs and Outputs | -0.3 | 0.3 | V | VSS, 0.3V to VDD+0.3V | 3 | ||
| Current at Output and Supply Pins | -30 | 30 | mA | 3 | |||
| Storage Temperature | -65 | 150 | °C | 3 | |||
| Max. Junction Temperature | TJ | 150 | °C | 3 | |||
| Thermal Resistance, 8L-SOIC | θJA | 150 | °C/W | 6 | |||
| Input Offset Voltage Quadratic Temperature Coefficient | TC2 | 0.2 | nV/°C² | TA = -40 to +125°C; printed ±0.2 | 3 | ||
| Input Bias Current | IB | 7 | pA | 3 | |||
| Input Offset Current | IOS | 70 | pA | printed ±70 | 3 | ||
| Output Short Circuit Current | ISC | 12 | mA | VDD = 2.3V; printed ±12 | 4 | ||
| Output Short Circuit Current | ISC | 22 | mA | VDD = 5.5V; printed ±22 | 4 | ||
| Gain Bandwidth Product | GBWP | 2 | MHz | 5 | |||
| Slew Rate | SR | 1 | V/µs | 5 | |||
| Phase Margin | PM | 65 | ° | G = +1 | 5 | ||
| Input Noise Voltage | Eni | 1 | µVP-P | f = 0.1 Hz to 10 Hz | 5 | ||
| Input Noise Voltage Density | eni | 50 | nV/√Hz | f < 5 kHz | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | MS = Plastic Micro Small Outline Package, 8-lead SN = Plastic SOIC (150mil Body), 8-lead | 47 |
CAD (KiCad official)
- Symbol:
MCP6V28-E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mcp6v28-e-etched.step/mcp6v28-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp6v28-e.step/mcp6v28-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (50 pp, sha256
8463f546bafb051f, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).