component

PIC12F617-I

Public Made by Adom

by adom

Microchip Tech MICROCHIP, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllerspic12f617-ifactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

PIC12F617-I

Microchip Tech · MICROCHIP · SOIC-8

PIC12F617-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive supply.
2 GP5/T1CKI/P1A*/OSC1/CLKIN bidirectional General purpose I/O with programmable pull-up and interrupt-on-change; also Timer1 clock input, alternate P1A PWM output, crystal/resonator OSC1 connection, and external clock/RC oscillator input CLKIN.
3 GP4/AN3/CIN1-/T1G/P1B*/OSC2/CLKOUT bidirectional General purpose I/O with programmable pull-up and interrupt-on-change; also A/D channel 3 input, comparator inverting input CIN1-, Timer1 gate, alternate P1B PWM output, crystal OSC2 connection, and FOSC/4 CLKOUT.
4 GP3/T1G*/MCLR/VPP input Input-only pin with interrupt-on-change; also alternate Timer1 gate, Master Clear reset with weak internal pull-up, and high-voltage programming input VPP.
5 GP2/AN2/T0CKI/INT/COUT/CCP1/P1A bidirectional General purpose I/O with programmable pull-up and interrupt-on-change; also A/D channel 2 input, Timer0 clock input, external interrupt, comparator output, CCP1 capture/compare/PWM, and P1A PWM output.
6 GP1/AN1/CIN0-/VREF/ICSPCLK bidirectional General purpose I/O with programmable pull-up and interrupt-on-change; also A/D channel 1 input, comparator inverting input CIN0-, external A/D voltage reference VREF, and ICSP serial programming clock.
7 GP0/AN0/CIN+/P1B/ICSPDAT bidirectional General purpose I/O with programmable pull-up and interrupt-on-change; also A/D channel 0 input, comparator non-inverting input CIN+, P1B PWM output, and ICSP serial programming data I/O.
8 VSS power_in Ground reference.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Embedded Processors & Controllers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 2 5.5 V FOSC <= 4 MHz (D001); same range for FOSC <= 8 MHz (D001B) 145
Supply Voltage VDD 3 5.5 V FOSC <= 10 MHz (D001C) 145
Supply Voltage VDD 4.5 5.5 V FOSC <= 20 MHz (D001D) 145
Operating temperature, industrial TA -40 85 °C Industrial (-I) 145
RAM Data Retention Voltage VDR 1.5 V Device in Sleep mode 145
VDD Rise Rate for POR SVDD 0.05 V/ms To ensure internal Power-on Reset signal 145
Ambient temperature under bias -40 125 °C 143
Storage temperature -65 150 °C 143
Voltage on VDD with respect to VSS VDD -0.3 6.5 V 143
Voltage on MCLR with respect to VSS MCLR -0.3 13.5 V 143
Voltage on all other pins with respect to VSS -0.3 V Upper limit printed as (VDD + 0.3V) 143
Maximum current out of VSS pin 95 mA 143
Maximum current into VDD pin 95 mA 143
Input clamp current IIK 20 mA VI < 0 or VI > VDD 143
Output clamp current IOK 20 mA Vo < 0 or Vo > VDD 143
Maximum output current sunk by any I/O pin 25 mA 143
Maximum output current sourced by any I/O pin 25 mA 143
Maximum current sunk by GPIO 90 mA 143
Maximum current sourced GPIO 90 mA 143
Input Low Voltage, I/O port with TTL buffer VIL 0.8 V 4.5V <= VDD <= 5.5V (D030) 152
Input Low Voltage, OSC1 (XT and LP modes) VIL 0.3 V D033 152
Input High Voltage, I/O ports with TTL buffer VIH 2 V 4.5V <= VDD <= 5.5V (D040) 152
Input High Voltage, OSC1 (XT and LP modes) VIH 1.6 V D043 152
Input Leakage Current, I/O ports IIL 0.1 1 µA VSS <= VPIN <= VDD, pin at high-impedance (D060) 152
Input Leakage Current, GP3/MCLR IIL 0.7 5 µA VSS <= VPIN <= VDD (D061) 152
Input Leakage Current, OSC1 IIL 0.1 5 µA VSS <= VPIN <= VDD, XT, HS and LP oscillator configuration (D063) 152
GPIO Weak Pull-up Current IPUR 50 250 400 µA VDD = 5.0V, VPIN = VSS (D070) 152
Output Low Voltage, I/O ports VOL 0.6 V IOL = 8.5 mA, VDD = 4.5V, -40°C to +85°C (D080) 152
Capacitive Loading on OSC2 pin COSC2 15 pF In XT, HS and LP modes when external clock is used to drive OSC1 153
Capacitive Loading on all I/O pins CIO 50 pF 153
VDD for Bulk Erase/Write VPEW 4.5 5.5 V 153
Erase/Write cycle time TPEW 2 2.5 ms 153
Flash Characteristic Retention TRETD 40 Year Provided no other specifications are violated 153
Supply Current, LP mode IDD 13 25 µA VDD = 2.0V, FOSC = 32 kHz LP Oscillator mode (D010) 146
Supply Current, XT mode IDD 0.66 1 mA VDD = 5.0V, FOSC = 4 MHz XT Oscillator mode (D012) 146
Supply Current, INTOSC mode IDD 1.2 1.6 mA VDD = 5.0V, FOSC = 8 MHz INTOSC mode (D017) 146
Supply Current, HS mode IDD 2.8 3.35 mA VDD = 5.0V, FOSC = 20 MHz HS Oscillator mode (D019) 146
Power-down Base Current IPD 0.05 0.9 µA VDD = 2.0V, WDT, BOR, Comparator, VREF and T1OSC disabled (D020) 148
Power-down Base Current IPD 0.35 1.5 µA VDD = 5.0V, WDT, BOR, Comparator, VREF and T1OSC disabled (D020) 148
WDT Current IPD 9.5 17 µA VDD = 5.0V (D021) 148
BOR Current IPD 6 12 µA VDD = 5.0V (D022) 148
Comparator Current, single comparator enabled IPD 60 75 µA VDD = 5.0V (D023) 148
Internal Calibrated INTOSC Frequency (4 MHz), 1% INTOSC 3.96 4 4.04 MHz VDD = 3.5V, TA = 25°C 157
Internal Calibrated INTOSC Frequency (8 MHz), 1% INTOSC 7.92 8 8.08 MHz VDD = 3.5V, TA = 25°C 157
Internal Calibrated INTOSC Frequency (8 MHz), 5% INTOSC 7.6 8 8.4 MHz 2.0V <= VDD <= 5.5V, -40°C <= TA <= +85°C (Ind.) 157
MCLR Pulse Width (low) TMCL 2 µs VDD = 5V, -40°C to +85°C 160
Watchdog Timer Time-out Period (No Prescaler) TWDT 10 20 30 ms VDD = 5V, -40°C to +85°C 160
Power-up Timer Period TPWRT 40 65 140 ms 160
Brown-out Reset Voltage VBOR 2 2.15 2.3 V 160
Brown-out Reset Hysteresis VHYST 100 mV 160
Comparator Input Offset Voltage VOS 5 10 mV 162
Comparator Input Common Mode Voltage VCM 0 V Upper limit printed as VDD - 1.5 162
VP6 voltage output VP6OUT 0.5 0.6 0.7 V 163
V1P2 voltage output V1P2OUT 1.05 1.2 1.35 V 163
ADC Resolution NR 10 bits 164
ADC Offset Error EOFF 1.5 2 LSb VREF = 5.12V 164
Thermal Resistance Junction to Ambient θJA 149.5 °C/W 8-pin SOIC package 154
Thermal Resistance Junction to Case θJC 39.9 °C/W 8-pin SOIC package 154
Die Temperature TDIE 150 °C 154

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin SN = 8-lead Small Outline (150 mil) (SOIC) MS = Micro Small Outline (MSOP) 211

CAD (KiCad official)

  • Symbol: PIC12F617-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: pic12f617-i-etched.step / pic12f617-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic12f617-i.step / pic12f617-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (212 pp, sha256 dc273ef045b5c299, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF