FT60F211-RB from FMD Fremont Micro Devices, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Positive supply input. Operating range 1.9 V - 5.5 V (Fsys<=8 MHz) or 2.7 V - 5.5 V (Fsys<=16 MHz). Decouple to VSS with a 100 nF ceramic capacitor close to the pin.
2	PA5/MCLRB/ELVD0/[P1D]	bidirectional	Multiplexed pin. Default PA5 general-purpose I/O with input-change interrupt (IOC) and optional weak pull-up; alternate functions are MCLRB external reset input (CMOS, has fixed pull-up), ELVD0 analog external LVD/comparator input, and remap-target output for PWMD (P1D). PA5 is the only PORTA pin that can be used as external reset.
3	PA4/P1B/P1A0N/ELVD1/CLKO/AT0	bidirectional	Multiplexed pin. Default PA4 GPIO with IOC and pull-up; alternate functions are PWMB (P1B) output, P1A0N complementary PWM output of P1A pair, ELVD1 analog LVD external input, CLKO system-clock buffered output, and AT0 factory test analog output. PA4 supports high sink/source drive (3/6/24 mA capable per figure notes).
4	PA3/P1A0/CLKI	bidirectional	Multiplexed pin. Default PA3 GPIO with IOC and pull-up; alternate functions are P1A0 PWMA output (positive of the P1A complementary pair) and CLKI external clock/crystal input (up to 20 MHz XTAL). Touch key TK3 shown on the pinout diagram is available only on the FT62F211-RB (touch-enabled) variant, not on FT60F211-RB.
5	PA2/T0CKI/INT/BK0/P1C	bidirectional	Multiplexed pin. Default PA2 GPIO with IOC and pull-up; alternate functions are T0CKI Timer0 external clock input, INT external interrupt input, BK0 PWM brake/fault input, and P1C PWMC output. Pin type is CMOS. Touch key TK2 shown on the pinout diagram is only present on FT62F211-RB.
6	PA1/P1D/ICSPDAT/LVR	bidirectional	Multiplexed pin. Default PA1 GPIO with IOC and pull-up; alternate functions are PWMD (P1D) output, ICSPDAT in-circuit programming/OCD data pin, and LVR level output (LVR test observation). Touch key TK1 shown on the pinout is only on FT62F211-RB.
7	PA0/[P1C]/ICSPCLK	bidirectional	Multiplexed pin. Default PA0 GPIO with IOC and pull-up; alternate functions are remap-target output for PWMC (P1C) and ICSPCLK in-circuit programming/OCD clock pin. Touch key TK0 shown on the pinout is only on FT62F211-RB.
8	VSS	power_in	Ground reference / negative supply return. Connect to the system ground plane with a low-impedance path.

Key specifications

Parameter	Value
Manufacturer	FMD Fremont Micro Devices
Package	SOP-8
Category	MCU
Pins	8

Ordering variants

Same part, different packaging or reel option.

FT60F211-RB
FT60F211-RB-URT
FT60F211-RB-HRT

CAD (KiCad official)

Symbol: FT60F211-RB
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`ft60f211-rb.step`	122 KB	You want the bare part, or you mark your own boards.
`ft60f211-rb-etched.step`	2.0 MB	You want the part with `FT60F211-RB` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 516 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: FMD Fremont Micro Devices datasheet (96 pp, sha256 9e7503953599b207, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF