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MSP430FR6047IPZ
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Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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Datasheet
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README
markdownMSP430FR6047IPZ
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)
MSP430FR6047IPZ from Texas Instruments, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P2.2/COUT/UCA0CLK/A14/C14 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are COUT, UCA0CLK, ADC input A14 and comparator input C14. |
| 2 | P2.3/TA0.0/UCA0STE/A15/C15 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TA0.0, UCA0STE, ADC input A15 and comparator input C15. |
| 3 | P1.0/UCA1CLK/TA1.0/A0/C0/VREF-/VeREF- | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates include UCA1CLK, TA1.0, ADC input A0, comparator input C0, and the VREF- output / external VeREF- input. |
| 4 | P1.1/UCA1STE/TA4.0/A1/C1/VREF+/VeREF+ | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates include UCA1STE, TA4.0, ADC input A1, comparator input C1, and the VREF+ output / external VeREF+ input. |
| 5 | AVSS2 | power_in | Analog ground supply. |
| 6 | PJ.4/LFXIN | bidirectional | General-purpose digital I/O; alternate function is LFXIN, the input for the low-frequency crystal oscillator LFXT. |
| 7 | PJ.5/LFXOUT | bidirectional | General-purpose digital I/O; alternate function is LFXOUT, the output of the low-frequency crystal oscillator LFXT. |
| 8 | AVSS3 | power_in | Analog ground supply. |
| 9 | PJ.6/HFXIN | bidirectional | General-purpose digital I/O; alternate function is HFXIN, the input for the high-frequency crystal oscillator HFXT. |
| 10 | PJ.7/HFXOUT | bidirectional | General-purpose digital I/O; alternate function is HFXOUT, the output of the high-frequency crystal oscillator HFXT. |
| 11 | AVSS4 | power_in | Analog ground supply. |
| 12 | P1.4/TB0.4/UCB0STE/A2/C2 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TB0.4, UCB0STE, ADC input A2 and comparator input C2. |
| 13 | P1.5/TB0.5/UCB0CLK/A3/C3 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TB0.5, UCB0CLK, ADC input A3 and comparator input C3. |
| 14 | P1.6/UCB0SIMO/UCB0SDA/A4/C4 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCB0SIMO/UCB0SDA, ADC input A4 and comparator input C4. |
| 15 | P1.7/USSTRG/UCB0SOMI/UCB0SCL/A5/C5 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are USSTRG (USS trigger input), UCB0SOMI/UCB0SCL, ADC input A5 and comparator input C5. |
| 16 | P2.0/UCA0SIMO/UCA0TXD/A6/C6 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA0SIMO/UCA0TXD, ADC input A6 and comparator input C6; it is BSLTX on devices with UART BSL. |
| 17 | P2.1/UCA0SOMI/UCA0RXD/A7/C7 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA0SOMI/UCA0RXD, ADC input A7 and comparator input C7; it is BSLRX on devices with UART BSL. |
| 18 | P1.2/UCA1SIMO/UCA1TXD/A8/C8 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA1SIMO/UCA1TXD, ADC input A8 and comparator input C8. |
| 19 | P1.3/UCA1SOMI/UCA1RXD/A9/C9 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA1SOMI/UCA1RXD, ADC input A9 and comparator input C9. |
| 20 | TEST/SBWTCK | input | Test mode pin that selects digital I/O on the JTAG pins; it has an internal pulldown always enabled, and doubles as the Spy-Bi-Wire input clock SBWTCK. |
| 21 | RST/NMI/SBWTDIO | bidirectional | Reset input, active low, with internal pullup; alternates are NMI (nonmaskable interrupt input) and SBWTDIO (Spy-Bi-Wire data input/output). |
| 22 | PJ.0/TDO/ACLK/SRSCG1/DMAE0/C10 | bidirectional | General-purpose digital I/O; alternates are JTAG TDO, ACLK, SRSCG1 (CPU status bit SCG1), DMAE0 and comparator input C10. |
| 23 | PJ.1/TDI/TCLK/SMCLK/SRSCG0/TA4CLK/C11 | bidirectional | General-purpose digital I/O; alternates are JTAG TDI/TCLK, SMCLK, SRSCG0 (CPU status bit SCG0), TA4CLK and comparator input C11. |
| 24 | PJ.2/TMS/MCLK/SROSCOFF/TB0OUTH/C12 | bidirectional | General-purpose digital I/O; alternates are JTAG TMS, MCLK, SROSCOFF (CPU status bit OSCOFF), TB0OUTH and comparator input C12. |
| 25 | PJ.3/TCK/RTCCLK/SRCPUOFF/TB0.6/C13 | bidirectional | General-purpose digital I/O; alternates are JTAG TCK, RTCCLK, SRCPUOFF (CPU status bit CPUOFF), TB0.6 and comparator input C13. |
| 26 | DVSS1 | power_in | Digital ground supply. |
| 27 | DVCC1 | power_in | Digital power supply; recommended operating range is 1.8 V to 3.6 V. |
| 28 | P2.4/TA0CLK/TB0CLK/TA1CLK/LCDS32 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TA0CLK, TB0CLK, TA1CLK and LCD segment S32. |
| 29 | P2.5/TA4.0/LCDS31 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TA4.0 and LCD segment S31. |
| 30 | P2.6/TA4.1/LCDS30 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TA4.1 and LCD segment S30. |
| 31 | P3.0/TB0.0/LCDS29 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TB0.0 and LCD segment S29. |
| 32 | P3.1/TB0.1/LCDS28 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TB0.1 and LCD segment S28. |
| 33 | P3.2/TB0.2/LCDS27 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TB0.2 and LCD segment S27. |
| 34 | P3.3/TB0.3/LCDS26 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TB0.3 and LCD segment S26. |
| 35 | P3.4/TB0OUTH/LCDS25 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TB0OUTH and LCD segment S25. |
| 36 | P3.5/TB0.4/LCDS24 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TB0.4 and LCD segment S24. |
| 37 | P3.6/TB0.5/LCDS23 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TB0.5 and LCD segment S23. |
| 38 | P3.7/TB0.6/LCDS22 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TB0.6 and LCD segment S22. |
| 39 | P2.7/TA0.0/LCDS21 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TA0.0 and LCD segment S21. |
| 40 | P9.0/TA1.0/LCDS20 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TA1.0 and LCD segment S20. |
| 41 | P9.1/SMCLK/LCDS19 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are SMCLK output and LCD segment S19. |
| 42 | P9.2/MCLK/LCDS18 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are MCLK output and LCD segment S18. |
| 43 | P9.3/ACLK/LCDS17 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are ACLK output and LCD segment S17. |
| 44 | P4.0/RTCCLK/LCDS16 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are RTCCLK and LCD segment S16. |
| 45 | P4.1/UCA0CLK/LCDS15 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA0CLK and LCD segment S15. |
| 46 | P4.2/UCA0STE/LCDS14 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA0STE and LCD segment S14. |
| 47 | P4.3/UCA0SIMO/UCA0TXD/LCDS13 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA0SIMO/UCA0TXD and LCD segment S13. |
| 48 | P4.4/UCA0SOMI/UCA0RXD/LCDS12 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA0SOMI/UCA0RXD and LCD segment S12. |
| 49 | P4.5/TA0CLK/TA1CLK/LCDS11 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TA0CLK, TA1CLK and LCD segment S11. |
| 50 | P4.6/TB0CLK/TA4CLK/LCDS10 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TB0CLK, TA4CLK and LCD segment S10. |
| 51 | DVSS2 | power_in | Digital ground supply. |
| 52 | DVCC2 | power_in | Digital power supply; recommended operating range is 1.8 V to 3.6 V. |
| 53 | P4.7/DMAE0/LCDS9 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are DMAE0 and LCD segment S9. |
| 54 | P5.0/UCA2SIMO/UCA2TXD/LCDS8 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA2SIMO/UCA2TXD and LCD segment S8. |
| 55 | P5.1/UCA2SOMI/UCA2RXD/LCDS7 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA2SOMI/UCA2RXD and LCD segment S7. |
| 56 | P5.2/UCA2CLK/LCDS6 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA2CLK and LCD segment S6. |
| 57 | P5.3/UCA2STE/LCDS5 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA2STE and LCD segment S5. |
| 58 | P5.4/UCB1CLK/LCDS4 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCB1CLK and LCD segment S4. |
| 59 | P5.5/TA0CLK/UCB1SIMO/UCB1SDA/LCDS3 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TA0CLK, UCB1SIMO/UCB1SDA and LCD segment S3. |
| 60 | P5.6/UCB1SOMI/UCB1SCL/LCDS2 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCB1SOMI/UCB1SCL and LCD segment S2. |
| 61 | P5.7/UCB1STE/LCDS1 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCB1STE and LCD segment S1. |
| 62 | P6.0/COUT/LCDS0 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are COUT and LCD segment S0. |
| 63 | P6.4/COM0 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternate is LCD common output COM0 for the LCD backplane. |
| 64 | P6.5/COM1 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternate is LCD common output COM1 for the LCD backplane. |
| 65 | P6.6/COM2/LCDS38 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are LCD common output COM2 and LCD segment S38. |
| 66 | P6.7/COM3/LCDS37 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are LCD common output COM3 and LCD segment S37. |
| 67 | P7.0/UCA2SIMO/UCA2TXD/ACLK/COM4/LCDS36 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA2SIMO/UCA2TXD, ACLK, LCD common COM4 and LCD segment S36. |
| 68 | P7.1/UCA2SOMI/UCA2RXD/SMCLK/COM5/LCDS35 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA2SOMI/UCA2RXD, SMCLK, LCD common COM5 and LCD segment S35. |
| 69 | P7.2/UCA2CLK/TB0.0/COM6/LCDS34 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA2CLK, TB0.0, LCD common COM6 and LCD segment S34. |
| 70 | P7.3/UCA2STE/TB0.1/COM7/LCDS33 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA2STE, TB0.1, LCD common COM7 and LCD segment S33. |
| 71 | P6.1/R03 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternate is R03, the input/output port of the lowest analog LCD voltage (V5). |
| 72 | P6.2/R13/LCDREF | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are R13 (third most positive analog LCD voltage) and LCDREF, the external reference input for the regulated LCD voltage. |
| 73 | P6.3/R23 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternate is R23, the input/output port of the second most positive analog LCD voltage (V2). |
| 74 | R33/LCDCAP | bidirectional | Input/output port of the most positive analog LCD voltage (V1) and LCD capacitor connection; must be connected to DVSS if not used. |
| 75 | DVSS3 | power_in | Digital ground supply. |
| 76 | DVCC3 | power_in | Digital power supply; recommended operating range is 1.8 V to 3.6 V. |
| 77 | P7.4/TA0.1/MTIF_OUT_IN | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TA0.1 and the meter test interface input/output MTIF_OUT_IN. |
| 78 | P7.5/TA1.1/MTIF_PIN_EN | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TA1.1 and the meter test interface pin enable MTIF_PIN_EN. |
| 79 | P8.0/UCA3STE/TB0.2/DMAE0 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA3STE, TB0.2 and DMAE0. |
| 80 | P8.1/UCA3CLK/TB0.3/TB0OUTH | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA3CLK, TB0.3 and TB0OUTH. |
| 81 | P8.2/UCA3SOMI/UCA3RXD/MCLK | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA3SOMI/UCA3RXD and MCLK output. |
| 82 | P8.3/UCA3SIMO/UCA3TXD/RTCCLK | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCA3SIMO/UCA3TXD and RTCCLK output. |
| 83 | P7.6/TA4.1/DMAE0/COUT | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TA4.1, DMAE0 and COUT. |
| 84 | P7.7/TA0.2/TB0OUTH/COUT | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are TA0.2, TB0OUTH and COUT. |
| 85 | CH1_IN | input | USS channel 1 receive input. |
| 86 | CH1_OUT | bidirectional | USS channel 1 transmit output. |
| 87 | PVSS | power_in | USS ground supply; PVSS pair with PVCC needs a low-ESR 22-µF ceramic capacitor placed within a few millimeters. |
| 88 | PVCC | power_in | USS power supply; recommended operating range is 2.2 V to 3.6 V. |
| 89 | PVSS | power_in | USS ground supply. |
| 90 | CH0_OUT | bidirectional | USS channel 0 transmit output. |
| 91 | CH0_IN | input | USS channel 0 receive input. |
| 92 | P8.4/UCB1CLK/TA1.2/A10 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCB1CLK, TA1.2 and ADC input A10. |
| 93 | P8.5/UCB1SIMO/UCB1SDA/A11 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCB1SIMO/UCB1SDA and ADC input A11. |
| 94 | P8.6/UCB1SOMI/UCB1SCL/A12 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCB1SOMI/UCB1SCL and ADC input A12. |
| 95 | P8.7/UCB1STE/USSXT_BOUT/A13 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; alternates are UCB1STE, the buffered USSXT clock output USSXT_BOUT, and ADC input A13. |
| 96 | AVSS5 | power_in | Analog ground supply. |
| 97 | USSXTIN | input | Input for the crystal or resonator of oscillator USSXT; do not connect to AVCC or DVCC and do not drive an external clock because bypass mode is not supported. |
| 98 | USSXTOUT | output | Output for the crystal or resonator of oscillator USSXT; do not connect to AVCC or DVCC, and leave open when unused. |
| 99 | AVSS1 | power_in | Analog ground supply. |
| 100 | AVCC1 | power_in | Analog power supply; recommended operating range is 1.8 V to 3.6 V and DVCC-AVCC difference must stay within ±0.3 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
CAD (KiCad official)
- Symbol:
MSP430FR6047IPZ - Footprint:
Package_QFP:LQFP-100_14x14mm_P0.5mm - 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files:
msp430fr6047ipz-etched.step/msp430fr6047ipz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430fr6047ipz.step/msp430fr6047ipz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (189 pp, sha256
db771c481d068712, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).