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SN74F253DR
Public Made by Adomby adom
Texas Instruments Signal Switches, Multiplexers, Decoders, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74F253DR
Texas Instruments · Signal Switches, Multiplexers, Decoders · SOIC-16
SN74F253DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1G | input | Strobe input for the first 4-line section; the 1Y output is disabled (high impedance) when this input is high. |
| 2 | B | input | Select input B, common to both 4-line sections, that together with A chooses which data input is routed to the outputs. |
| 3 | 1C3 | input | Data input 3 of the first 4-line section, selected when A and B are both high. |
| 4 | 1C2 | input | Data input 2 of the first 4-line section, selected when B is high and A is low. |
| 5 | 1C1 | input | Data input 1 of the first 4-line section, selected when A is high and B is low. |
| 6 | 1C0 | input | Data input 0 of the first 4-line section, selected when A and B are both low. |
| 7 | 1Y | tri_state | 3-state output of the first 4-line section; drives the bus at a low or high logic level when enabled and is high impedance when 1G is high. |
| 8 | GND | power_in | Ground pin of the device. |
| 9 | 2Y | tri_state | 3-state output of the second 4-line section; drives the bus at a low or high logic level when enabled and is high impedance when 2G is high. |
| 10 | 2C0 | input | Data input 0 of the second 4-line section, selected when A and B are both low. |
| 11 | 2C1 | input | Data input 1 of the second 4-line section, selected when A is high and B is low. |
| 12 | 2C2 | input | Data input 2 of the second 4-line section, selected when B is high and A is low. |
| 13 | 2C3 | input | Data input 3 of the second 4-line section, selected when A and B are both high. |
| 14 | A | input | Select input A, common to both 4-line sections, that together with B chooses which data input is routed to the outputs. |
| 15 | 2G | input | Strobe input for the second 4-line section; the 2Y output is disabled (high impedance) when this input is high. |
| 16 | VCC | power_in | Supply pin; recommended supply voltage is 4.5 V to 5.5 V (5 V nominal) and absolute maximum is 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN74F253DR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
sn74f253dr-etched.step/sn74f253dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74f253dr.step/sn74f253dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (13 pp, sha256
a8da140d625fbea2, retrieved 2026-10-08, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).