component
SN74HC244DTR
Public Made by Adomby adom
XBLW Buffers, Drivers, Receivers, Transceivers, SOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownSN74HC244DTR
XBLW · Buffers, Drivers, Receivers, Transceivers · SOP-20
SN74HC244DTR from XBLW, in a SOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for the 1Y outputs, active LOW; a HIGH puts them in high-impedance OFF-state. |
| 2 | 1A0 | input | Data input 1A0, buffered to 1Y0 (pin 18). |
| 3 | 2Y0 | output | Bus output 2Y0, 3-state, follows 2A0 (pin 17). |
| 4 | 1A1 | input | Data input 1A1, buffered to 1Y1 (pin 16). |
| 5 | 2Y1 | output | Bus output 2Y1, 3-state, follows 2A1 (pin 15). |
| 6 | 1A2 | input | Data input 1A2, buffered to 1Y2 (pin 14). |
| 7 | 2Y2 | output | Bus output 2Y2, 3-state, follows 2A2 (pin 13). |
| 8 | 1A3 | input | Data input 1A3, buffered to 1Y3 (pin 12). |
| 9 | 2Y3 | output | Bus output 2Y3, 3-state, follows 2A3 (pin 11). |
| 10 | GND | power_in | Ground (0 V). |
| 11 | 2A3 | input | Data input 2A3, buffered to 2Y3 (pin 9). |
| 12 | 1Y3 | output | Bus output 1Y3, 3-state, follows 1A3 (pin 8). |
| 13 | 2A2 | input | Data input 2A2, buffered to 2Y2 (pin 7). |
| 14 | 1Y2 | output | Bus output 1Y2, 3-state, follows 1A2 (pin 6). |
| 15 | 2A1 | input | Data input 2A1, buffered to 2Y1 (pin 5). |
| 16 | 1Y1 | output | Bus output 1Y1, 3-state, follows 1A1 (pin 4). |
| 17 | 2A0 | input | Data input 2A0, buffered to 2Y0 (pin 3). |
| 18 | 1Y0 | output | Bus output 1Y0, 3-state, follows 1A0 (pin 2). |
| 19 | 2OE | input | Output enable input for the 2Y outputs, active LOW; a HIGH puts them in high-impedance OFF-state. |
| 20 | VCC | power_in | Supply voltage, recommended 2.0 V to 6.0 V (absolute maximum 7.0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XBLW |
| Package | SOP-20 |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74HC244DTR - Footprint:
Package_SO:SOP-20_7.5x12.8mm_P1.27mm - 3D model: SOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
sn74hc244dtr-etched.step/sn74hc244dtr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc244dtr.step/sn74hc244dtr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XBLW datasheet (17 pp, sha256
00448a2ff21f3d25, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).