component
HT66F3197
Public Made by Adomby adom
Holtek Semicon Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHT66F3197
Holtek Semicon · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
HT66F3197 from Holtek Semicon, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB1/PTPI/PTP | bidirectional | General purpose I/O with register-enabled pull-high, shared with PTM capture input (PTPI) and PTM output (PTP). |
| 2 | PB2/PTCK/PTPB | bidirectional | General purpose I/O with register-enabled pull-high, shared with PTM clock input (PTCK) and PTM inverted output (PTPB). |
| 3 | PB3/CTP | bidirectional | General purpose I/O with register-enabled pull-high, shared with CTM output (CTP). |
| 4 | PB4/CTCK/CTPB | bidirectional | General purpose I/O with register-enabled pull-high, shared with CTM clock input (CTCK) and CTM inverted output (CTPB). |
| 5 | PB5 | bidirectional | General purpose I/O with register-enabled pull-high. |
| 6 | VDD | power_in | Positive power supply; operating range 1.8V to 5.5V depending on system clock frequency. |
| 7 | VSS | power_in | Ground. |
| 8 | PB6/OSC1 | bidirectional | General purpose I/O with register-enabled pull-high, shared with HXT oscillator pin OSC1. |
| 9 | PB7/OSC2 | bidirectional | General purpose I/O with register-enabled pull-high, shared with HXT oscillator pin OSC2. |
| 10 | PA5/SCK/SCL | bidirectional | General purpose I/O with register-enabled pull-high and wake-up, shared with SPI serial clock (SCK) and I2C clock line (SCL). |
| 11 | PA1/INT0/SCS | bidirectional | General purpose I/O with register-enabled pull-high and wake-up, shared with external interrupt 0 (INT0) and SPI slave select (SCS). |
| 12 | PA2/ICPCK/OCDSCK | bidirectional | General purpose I/O with register-enabled pull-high and wake-up, shared with ICP clock (ICPCK) and OCDS clock (OCDSCK, EV chip only). |
| 13 | PA3/INT1/SDO | bidirectional | General purpose I/O with register-enabled pull-high and wake-up, shared with external interrupt 1 (INT1) and SPI data output (SDO). |
| 14 | PA4/SDI/SDA | bidirectional | General purpose I/O with register-enabled pull-high and wake-up, shared with SPI data input (SDI) and I2C data line (SDA). |
| 15 | PA0/ICPDA/OCDSDA | bidirectional | General purpose I/O with register-enabled pull-high and wake-up, shared with ICP address/data (ICPDA) and OCDS address/data (OCDSDA, EV chip only). |
| 16 | PA6/INT0/RX | bidirectional | General purpose I/O with register-enabled pull-high and wake-up, shared with external interrupt 0 (INT0) and UART RX serial data input. |
| 17 | PA7/INT1/TX | bidirectional | General purpose I/O with register-enabled pull-high and wake-up, shared with external interrupt 1 (INT1) and UART TX serial data output. |
| 18 | PE0/STCK/STPB | bidirectional | General purpose I/O with register-enabled pull-high, shared with STM clock input (STCK) and STM inverted output (STPB). |
| 19 | PE1/STPI/STP | bidirectional | General purpose I/O with register-enabled pull-high, shared with STM capture input (STPI) and STM output (STP). |
| 20 | PE2/CTCK/CTPB | bidirectional | General purpose I/O with register-enabled pull-high, shared with CTM clock input (CTCK) and CTM inverted output (CTPB). |
| 21 | PE3/CTP | bidirectional | General purpose I/O with register-enabled pull-high, shared with CTM output (CTP). |
| 22 | PE4 | bidirectional | General purpose I/O with register-enabled pull-high. |
| 23 | PF0/SCS/SCOM0 | bidirectional | General purpose I/O with register-enabled pull-high, shared with SPI slave select (SCS) and software controlled LCD common output SCOM0. |
| 24 | PF1/SDO/SCOM1 | bidirectional | General purpose I/O with register-enabled pull-high, shared with SPI data output (SDO) and software controlled LCD common output SCOM1. |
| 25 | PF2/SDI/SDA/SCOM2 | bidirectional | General purpose I/O with register-enabled pull-high, shared with SPI data input (SDI), I2C data line (SDA) and SCOM2 LCD common output. |
| 26 | PF3/SCK/SCL/SCOM3 | bidirectional | General purpose I/O with register-enabled pull-high, shared with SPI clock (SCK), I2C clock line (SCL) and SCOM3 LCD common output. |
| 27 | AVDD | power_in | A/D converter power supply. |
| 28 | PF4/XT2 | bidirectional | General purpose I/O with register-enabled pull-high, shared with LXT oscillator pin XT2. |
| 29 | PF5/XT1 | bidirectional | General purpose I/O with register-enabled pull-high, shared with LXT oscillator pin XT1. |
| 30 | AVSS | power_in | A/D converter ground. |
| 31 | PC0/AN0/VREFI | bidirectional | General purpose I/O with register-enabled pull-high, shared with A/D analog input AN0 and A/D converter PGA voltage input VREFI. |
| 32 | PC1/AN1/CMPO/VREF | bidirectional | General purpose I/O with register-enabled pull-high, shared with A/D analog input AN1, comparator output CMPO and A/D reference voltage input VREF. |
| 33 | PC2/PTPI/PTP/AN2 | bidirectional | General purpose I/O with register-enabled pull-high, shared with PTM capture input (PTPI), PTM output (PTP) and A/D analog input AN2. |
| 34 | PC3/PTCK/PTPB/AN3 | bidirectional | General purpose I/O with register-enabled pull-high, shared with PTM clock input (PTCK), PTM inverted output (PTPB) and A/D analog input AN3. |
| 35 | PC4/AN4 | bidirectional | General purpose I/O with register-enabled pull-high, shared with A/D analog input AN4. |
| 36 | PC5/AN5 | bidirectional | General purpose I/O with register-enabled pull-high, shared with A/D analog input AN5. |
| 37 | PC6/STPI/STP/AN6 | bidirectional | General purpose I/O with register-enabled pull-high, shared with STM capture input (STPI), STM output (STP) and A/D analog input AN6. |
| 38 | PC7/STCK/STPB/AN7 | bidirectional | General purpose I/O with register-enabled pull-high, shared with STM clock input (STCK), STM inverted output (STPB) and A/D analog input AN7. |
| 39 | PD0/AN8 | bidirectional | General purpose I/O with register-enabled pull-high, shared with A/D analog input AN8. |
| 40 | PD1/AN9 | bidirectional | General purpose I/O with register-enabled pull-high, shared with A/D analog input AN9. |
| 41 | PD2/AN10 | bidirectional | General purpose I/O with register-enabled pull-high, shared with A/D analog input AN10. |
| 42 | PD3/AN11 | bidirectional | General purpose I/O with register-enabled pull-high, shared with A/D analog input AN11. |
| 43 | PD4/AN12 | bidirectional | General purpose I/O with register-enabled pull-high, shared with A/D analog input AN12. |
| 44 | PD5/AN13 | bidirectional | General purpose I/O with register-enabled pull-high, shared with A/D analog input AN13. |
| 45 | PD6/AN14 | bidirectional | General purpose I/O with register-enabled pull-high, shared with A/D analog input AN14. |
| 46 | PF6/AN15/C- | bidirectional | General purpose I/O with register-enabled pull-high, shared with A/D analog input AN15 and comparator negative input C-. |
| 47 | PF7/C+ | bidirectional | General purpose I/O with register-enabled pull-high, shared with comparator positive input C+. |
| 48 | PB0/CX | bidirectional | General purpose I/O with register-enabled pull-high, shared with comparator output (CX). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Holtek Semicon |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (VSS−0.3V to VSS+6.0V) | -0.3 | 6 | V | Referenced to VSS | 13 | ||
| Input Voltage (VSS−0.3V to VDD+0.3V) | -0.3 | 0.3 | V | Min referenced to VSS; max is +0.3V above VDD | 13 | ||
| Storage Temperature | -50 | 125 | °C | 13 | |||
| Operating Temperature | -40 | 85 | °C | 13 | |||
| IOL Total | 80 | mA | 13 | ||||
| IOH Total | -80 | mA | 13 | ||||
| Total Power Dissipation | 500 | mW | 13 | ||||
| Operating Voltage (HXT) | VDD | 1.8 | 5.5 | V | fSYS=fHXT=4MHz | 13 | |
| Operating Voltage (HXT) | VDD | 2 | 5.5 | V | fSYS=fHXT=8MHz | 13 | |
| Operating Voltage (HXT) | VDD | 2.7 | 5.5 | V | fSYS=fHXT=12MHz | 13 | |
| Operating Voltage (HXT) | VDD | 3.3 | 5.5 | V | fSYS=fHXT=16MHz | 13 | |
| Operating Voltage (HIRC) | VDD | 1.8 | 5.5 | V | fSYS=fHIRC=4MHz | 13 | |
| Operating Voltage (HIRC) | VDD | 2 | 5.5 | V | fSYS=fHIRC=8MHz | 13 | |
| Operating Voltage (HIRC) | VDD | 2.7 | 5.5 | V | fSYS=fHIRC=12MHz | 13 | |
| Operating Voltage (LXT) | VDD | 1.8 | 5.5 | V | fSYS=fLXT=32.768kHz | 13 | |
| Operating Voltage (LIRC) | VDD | 1.8 | 5.5 | V | fSYS=fLIRC=32kHz | 13 | |
| Operating Current (HXT) | IDD | 0.5 | 0.8 | mA | VDD=3V, no load, all peripherals off, fSYS=fHXT=4MHz | 14 | |
| Operating Current (HXT) | IDD | 1 | 1.5 | mA | VDD=5V, no load, all peripherals off, fSYS=fHXT=4MHz | 14 | |
| Operating Current (HXT) | IDD | 0.8 | 1.2 | mA | VDD=3V, no load, all peripherals off, fSYS=fHXT=8MHz | 14 | |
| Operating Current (HXT) | IDD | 1.6 | 2.4 | mA | VDD=5V, no load, all peripherals off, fSYS=fHXT=8MHz | 14 | |
| Operating Current (HXT) | IDD | 1.2 | 1.8 | mA | VDD=3V, no load, all peripherals off, fSYS=fHXT=12MHz | 14 | |
| Operating Current (HXT) | IDD | 2.4 | 3.6 | mA | VDD=5V, no load, all peripherals off, fSYS=fHXT=12MHz | 14 | |
| Operating Current (HXT) | IDD | 3 | 4.5 | mA | VDD=5V, no load, all peripherals off, fSYS=fHXT=16MHz | 14 | |
| Operating Current (HIRC) | IDD | 0.5 | 0.8 | mA | VDD=3V, no load, all peripherals off, fSYS=fHIRC=4MHz | 14 | |
| Operating Current (HIRC) | IDD | 1 | 1.5 | mA | VDD=5V, no load, all peripherals off, fSYS=fHIRC=4MHz | 14 | |
| Operating Current (HIRC) | IDD | 0.8 | 1.2 | mA | VDD=3V, no load, all peripherals off, fSYS=fHIRC=8MHz | 14 | |
| Operating Current (HIRC) | IDD | 1.6 | 2.4 | mA | VDD=5V, no load, all peripherals off, fSYS=fHIRC=8MHz | 14 | |
| Operating Current (HIRC) | IDD | 1.2 | 1.8 | mA | VDD=3V, no load, all peripherals off, fSYS=fHIRC=12MHz | 14 | |
| Operating Current (HIRC) | IDD | 2.4 | 3.6 | mA | VDD=5V, no load, all peripherals off, fSYS=fHIRC=12MHz | 14 | |
| Operating Current (LXT) | IDD | 10 | 20 | μA | VDD=3V, no load, all peripherals off, fSYS=fLXT=32768Hz | 14 | |
| Operating Current (LXT) | IDD | 30 | 50 | μA | VDD=5V, no load, all peripherals off, fSYS=fLXT=32768Hz | 14 | |
| Operating Current (LIRC) | IDD | 10 | 20 | μA | VDD=3V, no load, all peripherals off, fSYS=fLIRC=32kHz | 14 | |
| Operating Current (LIRC) | IDD | 30 | 50 | μA | VDD=5V, no load, all peripherals off, fSYS=fLIRC=32kHz | 14 | |
| Standby Current (SLEEP Mode), WDT off | ISTB | 0.2 | 0.8 | μA | VDD=3V, no load, all peripherals off, WDT off | 14 | |
| Standby Current (SLEEP Mode), WDT off | ISTB | 0.5 | 1 | μA | VDD=5V, no load, all peripherals off, WDT off | 14 | |
| Standby Current (SLEEP Mode), WDT on | ISTB | 3 | μA | VDD=3V, no load, all peripherals off, WDT on | 14 | ||
| Standby Current (SLEEP Mode), WDT on | ISTB | 5 | μA | VDD=5V, no load, all peripherals off, WDT on | 14 | ||
| Standby Current (IDLE0 Mode) | 3 | 5 | μA | VDD=3V, no load, all peripherals off, fSUB on | 14 | ||
| Standby Current (IDLE0 Mode) | 5 | 10 | μA | VDD=5V, no load, all peripherals off, fSUB on | 14 | ||
| Input Low Voltage for I/O Ports | VIL | 0 | 1.5 | V | VDD=5V | 15 | |
| Input Low Voltage for I/O Ports | VIL | 0 | 0.2 | V | Printed as 0.2VDD (max = 0.2VDD) | 15 | |
| Input High Voltage for I/O Ports | VIH | 3.5 | 5 | V | VDD=5V | 15 | |
| Input High Voltage for I/O Ports | VIH | 0.8 | V | Printed as min 0.8VDD, max VDD | 15 | ||
| Sink Current for I/O Port | IOL | 7 | 14 | mA | VDD=1.8V, VOL=0.1VDD | 15 | |
| Sink Current for I/O Port | IOL | 16 | 32 | mA | VDD=3V, VOL=0.1VDD | 15 | |
| Sink Current for I/O Port | IOL | 32 | 64 | mA | VDD=5V, VOL=0.1VDD | 15 | |
| Source Current for I/O Port (level 0) | IOH | -1 | -2 | mA | VDD=3V, VOH=0.9VDD, SLEDCn[m+1, m]=00B (n=0, 1, 2, m=0 or 2 or 4 or 6) | 15 | |
| Source Current for I/O Port (level 0) | IOH | -2 | -4 | mA | VDD=5V, VOH=0.9VDD, SLEDCn[m+1, m]=00B (n=0, 1, 2, m=0 or 2 or 4 or 6) | 15 | |
| Source Current for I/O Port (level 3) | IOH | -5.5 | -11 | mA | VDD=3V, VOH=0.9VDD, SLEDCn[m+1, m]=11B (n=0, 1, 2, m=0 or 2 or 4 or 6) | 15 | |
| Source Current for I/O Port (level 3) | IOH | -11 | -22 | mA | VDD=5V, VOH=0.9VDD, SLEDCn[m+1, m]=11B (n=0, 1, 2, m=0 or 2 or 4 or 6) | 15 | |
| Pull-high Resistance for I/O Ports | RPH | 20 | 60 | 100 | kΩ | VDD=3V, LVPU=0 | 15 |
| Pull-high Resistance for I/O Ports | RPH | 10 | 30 | 50 | kΩ | VDD=5V, LVPU=0 | 15 |
| Pull-high Resistance for I/O Ports | RPH | 6.67 | 15 | 23 | kΩ | VDD=3V, LVPU=1 | 15 |
| Pull-high Resistance for I/O Ports | RPH | 3.5 | 7.5 | 12 | kΩ | VDD=5V, LVPU=1 | 15 |
| Low Voltage Reset Voltage tolerance (nominal 1.7V) | VLVR | -5 | 5 | % | LVR enable, voltage select 1.7V | 20 | |
| Low Voltage Reset Voltage tolerance (nominal 1.9V) | VLVR | -5 | 5 | % | LVR enable, voltage select 1.9V | 20 | |
| Low Voltage Reset Voltage tolerance (nominal 2.55V) | VLVR | -3 | 3 | % | LVR enable, voltage select 2.55V | 20 | |
| Low Voltage Reset Voltage tolerance (nominal 3.15V) | VLVR | -3 | 3 | % | LVR enable, voltage select 3.15V | 20 | |
| Low Voltage Reset Voltage tolerance (nominal 3.8V) | VLVR | -3 | 3 | % | LVR enable, voltage select 3.8V | 20 |
CAD (KiCad official)
- Symbol:
HT66F3197 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
ht66f3197-etched.step/ht66f3197-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ht66f3197.step/ht66f3197.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Holtek Semicon datasheet (210 pp, sha256
f27a5db1de7ef68e, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).