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PIC16LF1947-I

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Microchip Tech Pre-ordered MCUs, TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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PIC16LF1947-I

Microchip Tech · Pre-ordered MCUs · TQFP-64(10x10)

PIC16LF1947-I from Microchip Tech, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RE1/P2C/VLCD2 bidirectional General purpose I/O (ST input, CMOS output) that also carries the P2C PWM output and the VLCD2 LCD analog bias input.
2 RE0/P2D/VLCD1 bidirectional General purpose I/O (ST input, CMOS output) that also carries the P2D PWM output and the VLCD1 LCD analog bias input.
3 RG0/CCP3/P3A/SEG42 bidirectional General purpose I/O (ST input, CMOS output) that also carries the CCP3 capture/compare/PWM function, the P3A PWM output and LCD segment 42.
4 RG1/AN15/CPS15/TX2/CK2/C3OUT/SEG43 bidirectional General purpose I/O that also carries ADC channel AN15, CapSense input CPS15, EUSART2 TX2/CK2, comparator C3OUT and LCD segment 43.
5 RG2/AN14/CPS14/RX2/DT2/C3IN+/SEG44 bidirectional General purpose I/O that also carries ADC channel AN14, CapSense input CPS14, EUSART2 RX2/DT2, comparator C3IN+ input and LCD segment 44.
6 RG3/AN13/CPS13/C3IN0-/CCP4/P3D/SEG45 bidirectional General purpose I/O that also carries ADC channel AN13, CapSense input CPS13, comparator C3IN0- input, CCP4 and P3D PWM output and LCD segment 45.
7 RG5/MCLR/VPP input Input-only pin: when MCLR is enabled it is the Master Clear input with internal pull-up, and it serves as the VPP high-voltage programming pin.
8 RG4/AN12/CPS12/C3IN1-/CCP5/P1D/SEG26 bidirectional General purpose I/O that also carries ADC channel AN12, CapSense input CPS12, comparator C3IN1- input, CCP5 and P1D PWM output and LCD segment 26.
9 VSS power_in Ground reference.
10 VDD power_in Positive supply.
11 RF7/AN5/CPS5/C123IN3-/SS1/SEG25 bidirectional General purpose I/O (ST input, CMOS output) that also carries ADC channel AN5, CapSense input CPS5, comparator negative inputs C1IN3-/C2IN3-/C3IN3-, MSSP1 slave select SS1 and LCD segment 25.
12 RF6/AN11/CPS11/C1IN+/SEG24 bidirectional General purpose I/O that also carries ADC channel AN11, CapSense input CPS11, comparator C1IN+ positive input and LCD segment 24.
13 RF5/AN10/CPS10/C12IN1-/DACOUT/SEG23 bidirectional General purpose I/O that also carries ADC channel AN10, CapSense input CPS10, comparator negative inputs C1IN1-/C2IN1-, DAC output DACOUT and LCD segment 23.
14 RF4/AN9/CPS9/C2IN+/SEG22 bidirectional General purpose I/O that also carries ADC channel AN9, CapSense input CPS9, comparator C2IN+ positive input and LCD segment 22.
15 RF3/AN8/CPS8/C123IN2-/SEG21 bidirectional General purpose I/O that also carries ADC channel AN8, CapSense input CPS8, comparator negative inputs C1IN2-/C2IN2-/C3IN2- and LCD segment 21.
16 RF2/AN7/CPS7/C1OUT/SRQ/SEG20 bidirectional General purpose I/O that also carries ADC channel AN7, CapSense input CPS7, comparator C1OUT output, SR Latch non-inverting output SRQ and LCD segment 20.
17 RF1/AN6/CPS6/C2OUT/SRNQ/SEG19 bidirectional General purpose I/O that also carries ADC channel AN6, CapSense input CPS6, comparator C2OUT output, SR Latch inverting output SRNQ and LCD segment 19.
18 RF0/AN16/CPS16/C1IN0-/C2IN0-/SEG41/VCAP bidirectional General purpose I/O that also carries ADC channel AN16, CapSense input CPS16, comparator negative inputs C1IN0-/C2IN0-, LCD segment 41 and the VCAP voltage-regulator filter capacitor connection.
19 AVDD power_in Dedicated supply for the on-board analog circuits, separated from digital VDD to reduce switching noise.
20 AVSS power_in Dedicated ground for the on-board analog circuits, separated from digital VSS to reduce switching noise.
21 RA3/AN3/VREF+/CPS3/SEG35 bidirectional General purpose I/O (TTL input, CMOS output) that also carries ADC channel AN3, the A/D positive voltage reference input VREF+, CapSense input CPS3 and LCD segment 35.
22 RA2/AN2/VREF-/CPS2/SEG34 bidirectional General purpose I/O (TTL input, CMOS output) that also carries ADC channel AN2, the A/D negative voltage reference input VREF-, CapSense input CPS2 and LCD segment 34.
23 RA1/AN1/CPS1/SEG18 bidirectional General purpose I/O (TTL input, CMOS output) that also carries ADC channel AN1, CapSense input CPS1 and LCD segment 18.
24 RA0/AN0/CPS0/SEG33 bidirectional General purpose I/O (TTL input, CMOS output) that also carries ADC channel AN0, CapSense input CPS0 and LCD segment 33.
25 VSS power_in Ground reference.
26 VDD power_in Positive supply.
27 RA5/AN4/CPS4/SEG15 bidirectional General purpose I/O (TTL input, CMOS output) that also carries ADC channel AN4, CapSense input CPS4 and LCD segment 15.
28 RA4/T0CKI/SEG14 bidirectional General purpose I/O (TTL input, CMOS output) that also carries the Timer0 clock input T0CKI (Schmitt trigger) and LCD segment 14.
29 RC1/T1OSI/P2A/CCP2/SEG32 bidirectional General purpose I/O that also carries the Timer1 oscillator input T1OSI, the P2A PWM output or CCP2 capture/compare/PWM function (alternate pin via APFCON), and LCD segment 32.
30 RC0/T1OSO/T1CKI/SEG40 bidirectional General purpose I/O that also carries the Timer1 oscillator output T1OSO, the Timer1 clock input T1CKI and LCD segment 40.
31 RC6/TX1/CK1/SEG27 bidirectional General purpose I/O that also carries EUSART1 asynchronous transmit TX1, synchronous clock CK1 and LCD segment 27.
32 RC7/RX1/DT1/SEG28 bidirectional General purpose I/O that also carries EUSART1 asynchronous receive RX1, synchronous data DT1 and LCD segment 28.
33 RC2/CCP1/P1A/SEG13 bidirectional General purpose I/O that also carries the CCP1 capture/compare/PWM function, the P1A PWM output and LCD segment 13.
34 RC3/SCK1/SCL1/SEG17 bidirectional General purpose I/O that also carries the MSSP1 SPI clock SCK1, I2C clock SCL1 (open-drain) and LCD segment 17.
35 RC4/SDI1/SDA1/SEG16 bidirectional General purpose I/O that also carries the MSSP1 SPI data input SDI1, I2C data SDA1 (open-drain) and LCD segment 16.
36 RC5/SDO1/SEG12 bidirectional General purpose I/O that also carries the MSSP1 SPI data output SDO1 and LCD segment 12.
37 RB7/ICSPDAT/ICDDAT/SEG39 bidirectional General purpose I/O with interrupt-on-change and individually enabled pull-up that also carries the ICSP data I/O ICSPDAT, the in-circuit debug data ICDDAT and LCD segment 39.
38 VDD power_in Positive supply.
39 RA7/OSC1/CLKIN/SEG37 bidirectional General purpose I/O that also carries the crystal/resonator input OSC1 (LP, XT, HS modes), the external clock input CLKIN (EC mode) and LCD segment 37.
40 RA6/OSC2/CLKOUT/SEG36 bidirectional General purpose I/O that also carries the crystal/resonator output OSC2 (LP, XT, HS modes), the FOSC/4 CLKOUT output and LCD segment 36.
41 VSS power_in Ground reference.
42 RB6/ICSPCLK/ICDCLK/SEG38 bidirectional General purpose I/O with interrupt-on-change and individually enabled pull-up that also carries the ICSP programming clock ICSPCLK, the in-circuit debug clock ICDCLK and LCD segment 38.
43 RB5/T1G/SEG29 bidirectional General purpose I/O with interrupt-on-change and individually enabled pull-up that also carries the Timer1 gate input T1G and LCD segment 29.
44 RB4/SEG11 bidirectional General purpose I/O with interrupt-on-change and individually enabled pull-up that also carries LCD segment 11.
45 RB3/SEG10 bidirectional General purpose I/O with interrupt-on-change and individually enabled pull-up that also carries LCD segment 10.
46 RB2/SEG9 bidirectional General purpose I/O with interrupt-on-change and individually enabled pull-up that also carries LCD segment 9.
47 RB1/SEG8 bidirectional General purpose I/O with interrupt-on-change and individually enabled pull-up that also carries LCD segment 8.
48 RB0/INT/SRI/FLT0/SEG30 bidirectional General purpose I/O with interrupt-on-change and individually enabled pull-up that also carries external interrupt INT, SR Latch input SRI, ECCP auto-shutdown fault input FLT0 and LCD segment 30.
49 RD7/SS2/SEG7 bidirectional General purpose I/O (ST input, CMOS output) that also carries the MSSP2 slave select input SS2 and LCD segment 7.
50 RD6/SCK2/SCL2/P1B/SEG6 bidirectional General purpose I/O that also carries the MSSP2 SPI clock SCK2, I2C clock SCL2 (open-drain), the P1B PWM output and LCD segment 6.
51 RD5/SDI2/SDA2/P1C/SEG5 bidirectional General purpose I/O that also carries the MSSP2 SPI data input SDI2, I2C data SDA2 (open-drain), the P1C PWM output and LCD segment 5.
52 RD4/SDO2/P3B/SEG4 bidirectional General purpose I/O that also carries the MSSP2 SPI data output SDO2, the P3B PWM output and LCD segment 4.
53 RD3/P3C/SEG3 bidirectional General purpose I/O that also carries the P3C PWM output and LCD segment 3.
54 RD2/P2B/SEG2 bidirectional General purpose I/O that also carries the P2B PWM output and LCD segment 2.
55 RD1/P2C/SEG1 bidirectional General purpose I/O that also carries the P2C PWM output and LCD segment 1.
56 VSS power_in Ground reference.
57 VDD power_in Positive supply.
58 RD0/P2D/SEG0 bidirectional General purpose I/O that also carries the P2D PWM output and LCD segment 0.
59 RE7/CCP2/P2A/SEG31 bidirectional General purpose I/O that also carries the alternate-location CCP2 capture/compare/PWM function, the P2A PWM output and LCD segment 31.
60 RE6/P1B/COM3 bidirectional General purpose I/O that also carries the P1B PWM output and LCD common driver COM3.
61 RE5/P1C/COM2 bidirectional General purpose I/O that also carries the P1C PWM output and LCD common driver COM2.
62 RE4/P3B/COM1 bidirectional General purpose I/O that also carries the P3B PWM output and LCD common driver COM1.
63 RE3/P3C/COM0 bidirectional General purpose I/O that also carries the P3C PWM output and LCD common driver COM0.
64 RE2/P2B/VLCD3 bidirectional General purpose I/O that also carries the P2B PWM output and the VLCD3 LCD analog bias input.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient temperature under bias -40 125 °C 376
Storage temperature -65 150 °C 376
Voltage on VDD with respect to VSS, PIC16LF1946/47 VDD -0.3 4 V PIC16LF1946/47 376
Voltage on VCAP pin with respect to VSS VCAP -0.3 4 V 376
Voltage on MCLR with respect to VSS MCLR -0.3 9 V 376
Voltage on all other pins with respect to VSS -0.3 V Max printed as VDD + 0.3V 376
Maximum current out of VSS pin, industrial 350 mA -40°C to +85°C for industrial 376
Maximum current into VDD pin, industrial 350 mA -40°C to +85°C for industrial 376
Clamp current IK 20 mA VPIN < 0 or VPIN > VDD 376
Operating ambient temperature range, industrial TA -40 85 °C Industrial temperature 377
VDD Supply Voltage (VDDMIN, VDDMAX), PIC16LF1946/47 VDD 1.8 3.6 V FOSC ≤ 16 MHz 380
VDD Supply Voltage (VDDMIN, VDDMAX), PIC16LF1946/47 VDD 2.5 3.6 V FOSC ≤ 32 MHz (NOTE 2) 380
RAM Data Retention Voltage, PIC16LF1946/47 VDR 1.5 V Device in Sleep mode 380
Fixed Voltage Reference Voltage for ADC VADFVR -8 6 % 1.024V, VDD ≥ 2.5V; 2.048V, VDD ≥ 2.5V; 4.096V, VDD ≥ 4.75V 380
Fixed Voltage Reference Voltage for Comparator and DAC VCDAFVR -11 7 % 1.024V, VDD ≥ 2.5V; 2.048V, VDD ≥ 2.5V; 4.096V, VDD ≥ 4.75V 380
Fixed Voltage Reference Voltage for LCD Bias, Initial Accuracy VLCDFVR -11 10 % 3.072V, VDD ≥ 3.6V 380
VDD Rise Rate to ensure internal Power-on Reset signal SVDD 0.05 V/ms 380
Input Leakage Current, I/O ports (85°C) IIL -125 125 nA VSS ≤ VPIN ≤ VDD, pin at high-impedance @ 85°C 388
Input Leakage Current, I/O ports (125°C) IIL -1000 1000 nA VSS ≤ VPIN ≤ VDD, pin at high-impedance @ 125°C 388
Input Leakage Current, MCLR IIL -200 200 nA VSS ≤ VPIN ≤ VDD @ 85°C 388
Weak Pull-up Current IPUR 25 100 200 µA VDD = 3.3V, VPIN = VSS 388
Output Low Voltage, I/O ports VOL 0.6 V IOL = 6mA, VDD = 3.3V; IOL = 1.8mA, VDD = 1.8V 388
OSC2 pin capacitive loading COSC2 15 pF In XT, HS and LP modes when external clock is used to drive OSC1 388
All I/O pins capacitive loading CIO 50 pF 388
External CLKIN Frequency, EC high FOSC 20 MHz EC Oscillator mode (high) 392
External CLKIN Frequency, EC medium FOSC 4 MHz EC Oscillator mode (medium) 392
External CLKIN Frequency, EC low FOSC 0.5 MHz EC Oscillator mode (low) 392
Oscillator Frequency, XT mode FOSC 0.1 4 MHz XT Oscillator mode 392
Oscillator Frequency, HS mode FOSC 1 4 MHz HS Oscillator mode 392
Oscillator Frequency, HS mode, VDD > 2.7V FOSC 1 20 MHz HS Oscillator mode, VDD > 2.7V 392
Instruction Cycle Time TCY 200 ns TCY = 4/FOSC 392
Internal-Calibrated HFINTOSC Frequency tolerance, 0°C to +60°C HFOSC -2 2 % 0°C ≤ TA ≤ +60°C, VDD ≥ 2.5V; nominal 16.0 MHz 393
Internal-Calibrated HFINTOSC Frequency tolerance, 60°C to +85°C HFOSC -3 3 % 60°C ≤ TA ≤ +85°C, VDD ≥ 2.5V; nominal 16.0 MHz 393
Internal-Calibrated HFINTOSC Frequency tolerance, -40°C to +125°C HFOSC -5 5 % -40°C ≤ TA ≤ +125°C; nominal 16.0 MHz 393
Internal-Calibrated MFINTOSC Frequency tolerance, 0°C to +60°C MFOSC -2 2 % 0°C ≤ TA ≤ +60°C, VDD ≥ 2.5V; nominal 500 kHz 393
Internal-Calibrated MFINTOSC Frequency tolerance, 60°C to +85°C MFOSC -3 3 % 60°C ≤ TA ≤ +85°C, VDD ≥ 2.5V; nominal 500 kHz 393
Internal-Calibrated MFINTOSC Frequency tolerance, -40°C to +125°C MFOSC -5 5 % -40°C ≤ TA ≤ +125°C; nominal 500 kHz 393
Supply Current IDD, LP oscillator, FOSC = 32 kHz (85°C max) IDD 5 11 µA 1.8V; FOSC = 32 kHz, LP Oscillator mode (Note 4), -40°C ≤ TA ≤ +85°C 382
Supply Current IDD, LP oscillator, FOSC = 32 kHz (85°C max) IDD 6 13 µA 3.0V; FOSC = 32 kHz, LP Oscillator mode (Note 4), -40°C ≤ TA ≤ +85°C 382
Power-down Base Current IPD, WDT/BOR/FVR/T1OSC disabled (+85°C max) IPD 0.06 1 µA 1.8V; +85°C column; WDT, BOR, FVR and T1OSC disabled, all peripherals inactive 385
Power-down Base Current IPD, WDT/BOR/FVR/T1OSC disabled (+125°C max) IPD 0.06 8 µA 1.8V; +125°C column; WDT, BOR, FVR and T1OSC disabled, all peripherals inactive 385
MCLR Pulse Width (low) TMCL 2 µs 396
Watchdog Timer Time-out Period TWDTLP 10 16 27 ms VDD = 3.3V-5V, 1:512 prescaler used 396
Power-up Timer Period, PWRTE = 0 TPWRT 40 65 140 ms PWRTE = 0 396
Brown-out Reset Voltage VBOR 2.55 2.7 2.85 V BORV = 0 396
Brown-out Reset Voltage VBOR 1.8 1.9 2.11 V BORV = 1 396
Brown-out Reset Hysteresis VHYST 0 25 50 mV -40°C to +85°C 396
Brown-out Reset DC Response Time TBORDC 1 3 35 µs VDD ≤ VBOR 396
Comparator Input Offset Voltage, High-Power mode VIOFF -60 7.5 60 mV High-Power mode, VICM = VDD/2 401
Comparator Response Time, Rising Edge, High-Power mode TRESP 400 800 ns High-Power mode 401
Comparator Mode Change to Output Valid TMC2OV 10 µs 401
DAC Settling Time CST 10 µs Settling time measured while DACR<4:0> transitions from '0000' to '1111' 401
ADC Reference Voltage VREF 1.8 V VREF = (VREF+ minus VREF-); max printed as VDD 398
Thermal Resistance Junction to Ambient, TQFP JA 48.3 °C/W 64-pin TQFP package 390
Thermal Resistance Junction to Case, TQFP JC 26.1 °C/W 64-pin TQFP package 390

CAD (KiCad official)

  • Symbol: PIC16LF1947-I
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: pic16lf1947-i-etched.step / pic16lf1947-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic16lf1947-i.step / pic16lf1947-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (459 pp, sha256 dea7e85cc0343ade, retrieved 2026-10-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF