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93LC86T-I
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdown93LC86T-I
Microchip Tech · Pre-ordered MCUs · SOIC-8
93LC86T-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip select: a high level selects the device and a low level deselects it and forces Standby mode, and CS must be low for 250 ns minimum (TCSL) between consecutive instructions. |
| 2 | CLK | input | Serial clock: opcode, address and data are clocked in on its rising edge, and maximum clock frequency is 3 MHz for 4.5 V ≤ VCC ≤ 6.0 V and 2 MHz for 2.5 V ≤ VCC ≤ 4.5 V. |
| 3 | DI | input | Serial data input used to clock in the Start bit, opcode, address and data synchronously with CLK. |
| 4 | DO | tri_state | Serial data output that presents read data TPD after the CLK rising edge and shows Ready/Busy status during erase/write while CS is high, otherwise remaining high-impedance. |
| 5 | VSS | power_in | Ground reference for the device. |
| 6 | ORG | input | Memory organization select: tied to VCC selects x16 organization and tied to VSS selects x8, with an internal pull-up that selects x16 when left unconnected. |
| 7 | PE | input | Program enable: floated or tied to VCC allows programming and tied to VSS inhibits all writes, with an internal pull-up that enables programming when left floating. |
| 8 | VCC | power_in | Power supply, specified from +2.5 V to +6.0 V over the recommended operating ranges. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VCC | 7 | V | 2 | |||
| All inputs and outputs w.r.t. VSS (minimum) | -0.6 | V | 2 | ||||
| Storage temperature | -65 | 150 | °C | 2 | |||
| Ambient temperature with power applied | -40 | 125 | °C | 2 | |||
| Soldering temperature of leads | 300 | °C | 10 seconds | 2 | |||
| Supply voltage (recommended operating range) | VCC | 2.5 | 6 | V | 3 | ||
| Ambient temperature, Industrial (I) grade | TA | -40 | 85 | °C | Industrial (I) | 3 | |
| High-level input voltage VIH1 | VIH1 | 2 | V | VCC ≥ 2.7V | 3 | ||
| High-level input voltage VIH2 | VIH2 | 0.7 | ×VCC | VCC < 2.7V | 3 | ||
| Low-level input voltage VIL1 | VIL1 | -0.3 | 0.8 | V | VCC ≥ 2.7V | 3 | |
| Low-level input voltage VIL2 | VIL2 | -0.3 | 0.2 | ×VCC | VCC < 2.7V | 3 | |
| Low-level output voltage VOL1 | VOL1 | 0.4 | V | IOL = 2.1 mA; VCC = 4.5V | 3 | ||
| Low-level output voltage VOL2 | VOL2 | 0.2 | V | IOL = 100 µA; VCC = VCC Min. | 3 | ||
| High-level output voltage VOH1 | VOH1 | 2.4 | V | IOH = -400 µA; VCC = 4.5V | 3 | ||
| Input leakage current | ILI | -10 | 10 | µA | VIN = 0.1V to VCC | 3 | |
| Output leakage current | ILO | -10 | 10 | µA | VOUT = 0.1V to VCC | 3 | |
| Pin capacitance (all inputs/outputs) | CINT | 7 | pF | TA = +25°C, FCLK = 1 MHz | 3 | ||
| Operating current, write | ICC | 3 | mA | VCC = 5.5V | 3 | ||
| Operating current, read | ICC | 1 | mA | FCLK = 3 MHz; VCC = 5.5V | 3 | ||
| Operating current, read | ICC | 500 | µA | FCLK = 1 MHz; VCC = 3.0V | 3 | ||
| Standby current | ICCS | 100 | µA | CLK = CS = 0V; VCC = 5.5V; DI = PE = VSS; ORG = VSS or VCC | 3 | ||
| Standby current | ICCS | 30 | µA | CLK = CS = 0V; VCC = 3.0V; DI = PE = VSS; ORG = VSS or VCC | 3 | ||
| Clock frequency | FCLK | 3 | MHz | 4.5V ≤ VCC ≤ 6.0V | 4 | ||
| Clock frequency | FCLK | 2 | MHz | 2.5V ≤ VCC ≤ 4.5V | 4 | ||
| Clock high time | TCKH | 200 | ns | 4.5V ≤ VCC ≤ 6.0V | 4 | ||
| Clock high time | TCKH | 300 | ns | 2.5V ≤ VCC ≤ 4.5V | 4 | ||
| Clock low time | TCKL | 100 | ns | 4.5V ≤ VCC ≤ 6.0V | 4 | ||
| Clock low time | TCKL | 200 | ns | 2.5V ≤ VCC ≤ 4.5V | 4 | ||
| Chip select setup time | TCSS | 50 | ns | 4.5V ≤ VCC ≤ 6.0V, Relative to CLK | 4 | ||
| Chip select setup time | TCSS | 100 | ns | 2.5V ≤ VCC ≤ 4.5V, Relative to CLK | 4 | ||
| Chip select hold time | TCSH | 0 | ns | 4 | |||
| Chip select low time | TCSL | 250 | ns | Relative to CLK | 4 | ||
| Data input setup time | TDIS | 50 | ns | 4.5V ≤ VCC ≤ 6.0V, Relative to CLK | 4 | ||
| Data input setup time | TDIS | 100 | ns | 2.5V ≤ VCC < 4.5V, Relative to CLK | 4 | ||
| Data input hold time | TDIH | 50 | ns | 4.5V ≤ VCC ≤ 6.0V, Relative to CLK | 4 | ||
| Data input hold time | TDIH | 100 | ns | 2.5V ≤ VCC ≤ 4.5V, Relative to CLK | 4 | ||
| Data output delay time | TPD | 100 | ns | 4.5V ≤ VCC ≤ 6.0V, CL = 100 pF | 4 | ||
| Data output delay time | TPD | 250 | ns | 2.5V ≤ VCC < 4.5V, CL = 100 pF | 4 | ||
| Data output disable time | TCZ | 100 | ns | 4.5V ≤ VCC ≤ 6.0V | 4 | ||
| Data output disable time | TCZ | 500 | ns | 2.5V ≤ VCC < 4.5V (Note 1) | 4 | ||
| Status valid time | Tsv | 200 | ns | 4.5V ≤ VCC ≤ 6.0V, CL = 100 pF | 4 | ||
| Status valid time | Tsv | 300 | ns | 2.5V ≤ VCC < 4.5V, CL = 100 pF | 4 | ||
| Program cycle time (erase/write mode) | TWC | 5 | ms | Erase/Write mode | 4 | ||
| Program cycle time (ERAL mode) | TEC | 15 | ms | ERAL mode | 4 | ||
| Program cycle time (WRAL mode) | TWL | 30 | ms | WRAL mode | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Package P = Plastic DIP (300 mil Body), 8-lead SN = Plastic SOIC (150 mil Body), 8-lead | 19 |
CAD (KiCad official)
- Symbol:
93LC86T-I - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
93lc86t-i-etched.step/93lc86t-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);93lc86t-i.step/93lc86t-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (22 pp, sha256
ee25ead8a8be679c, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).