component
LM43602PWP
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLM43602PWP
Texas Instruments · DC-DC Converters · HTSSOP-16-EP
LM43602PWP from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | output | Switching output of the regulator internally connected to both power MOSFETs; connect to power inductor. |
| 2 | SW | output | Switching output of the regulator internally connected to both power MOSFETs; connect to power inductor. |
| 3 | CBOOT | passive | Bootstrap capacitor connection for high-side driver; connect 470-nF capacitor from CBOOT to SW pin. |
| 4 | VCC | power_out | Internal bias supply output regulated at 3.2 V nominal; connect 2.2-10 µF bypass capacitor to AGND, never short or load this pin. |
| 5 | BIAS | power_in | Optional internal LDO supply input; tie to VOUT when 3.3 V ≤ VOUT ≤ 28 V, external 3.3-5 V rail if available, or tie to ground when not in use. |
| 6 | SYNC | input | Clock input to synchronize switching action to external clock 200-2200 kHz; use high-speed termination to prevent ringing, ground if not used. |
| 7 | RT | passive | Connect resistor from this pin to AGND to program switching frequency 200-2200 kHz; leave floating for 500 kHz default. |
| 8 | PGOOD | output | Open-drain output for power-good flag; use 10-100 kΩ pull-up resistor to logic rail or DC voltage no higher than 12 V. |
| 9 | FB | input | Feedback sense input pin; connect to midpoint of feedback divider to set VOUT, do not short this pin to ground during operation. |
| 10 | AGND | power_in | Analog ground pin; ground reference for internal references and logic, connect to system ground. |
| 11 | SS/TRK | input | Soft-start control pin; leave floating for 4.1 ms internal soft-start ramp, or connect capacitor to extend or external voltage ramp for tracking. |
| 12 | EN | input | Enable input to internal LDO and regulator; high = ON, low = OFF; connect to VIN or external voltage source, do not float. |
| 13 | VIN | power_in | Supply input pin 3.5-36 V to internal LDO and high-side FET; keep paths from VIN pin to bypass CIN and PGND as short as possible. |
| 14 | VIN | power_in | Supply input pin 3.5-36 V to internal LDO and high-side FET; keep paths from VIN pin to bypass CIN and PGND as short as possible. |
| 15 | PGND | power_in | Power ground pin connected internally to low-side FET; connect to system ground, PAD, AGND, and CIN/COUT ground pins with shortest paths. |
| 16 | PGND | power_in | Power ground pin connected internally to low-side FET; connect to system ground, PAD, AGND, and CIN/COUT ground pins with shortest paths. |
| 17 | PAD | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16-EP |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
LM43602PWP - Footprint:
Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files:
lm43602pwp-etched.step/lm43602pwp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm43602pwp.step/lm43602pwp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (52 pp, sha256
7057c203046aa5b7, retrieved 2026-09-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).