SN74AUC2G07DCKR from Texas Instruments, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1A	input	Input of buffer/driver 1; the input voltage range is -0.5 V to 3.6 V (absolute maximum), so it is tolerant of 3.6-V I/O while VCC is 0.8 V to 2.7 V.
2	GND	power_in	Device ground reference for both buffer/driver channels.
3	2A	input	Input of buffer/driver 2; the input voltage range is -0.5 V to 3.6 V (absolute maximum), so it is tolerant of 3.6-V I/O while VCC is 0.8 V to 2.7 V.
4	2Y	output	Open-drain output of buffer/driver 2 that can be wired-OR'd with other open-drain outputs; maximum sink current is 32 mA and the output voltage range is -0.5 V to VCC + 0.5 V (absolute maximum).
5	VCC	power_in	Supply voltage: recommended range is 0.8 V to 2.7 V, operational over that range but designed specifically for 1.65 V to 1.95 V; absolute maximum is -0.5 V to 3.6 V.
6	1Y	output	Open-drain output of buffer/driver 1 that can be wired-OR'd with other open-drain outputs; maximum sink current is 32 mA and the output voltage range is -0.5 V to VCC + 0.5 V (absolute maximum).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SC-70-6
Category	Logic ICs
Pins	6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage range (absolute maximum)	VCC	-0.5		3.6	V	over operating free-air temperature range	2
Input voltage range	VI	-0.5		3.6	V	over operating free-air temperature range	2
Voltage range applied to any output in the high-impedance or power-off state	VO	-0.5		3.6	V	high-impedance or power-off state; over operating free-air temperature range	2
Output voltage range	VO	-0.5			V	over operating free-air temperature range; maximum printed as VCC + 0.5 V	2
Input clamp current	IIK	-50			mA	VI < 0	2
Output clamp current	IOK	-50			mA	VO < 0	2
Continuous output current	IO	-20		20	mA		2
Continuous current through VCC or GND		-100		100	mA		2
Storage temperature range	Tstg	-65		150	°C		2
Package thermal impedance (DCK package)	θJA		259		°C/W	DCK package; calculated per JESD 51-7	2
Supply voltage	VCC	0.8		2.7	V		3
High-level input voltage	VIH	1.7			V	VCC = 2.3 V to 2.7 V	3
Low-level input voltage	VIL			0	V	VCC = 0.8 V	3
Low-level input voltage	VIL			0.7	V	VCC = 2.3 V to 2.7 V	3
Input voltage	VI	0		3.6	V		3
Output voltage	VO	0		3.6	V		3
Low-level output current	IOL			0.7	mA	VCC = 0.8 V	3
Low-level output current	IOL			3	mA	VCC = 1.1 V	3
Low-level output current	IOL			5	mA	VCC = 1.4 V	3
Low-level output current	IOL			8	mA	VCC = 1.65 V	3
Low-level output current	IOL			9	mA	VCC = 2.3 V	3
Input transition rise or fall rate	Δt/Δv			20	ns/V		3
Operating free-air temperature	TA	-40		85	°C		3
Low-level output voltage	VOL			0.2	V	IOL = 100 µA; VCC = 0.8 V to 2.7 V	3
Low-level output voltage	VOL			0.25	V	IOL = 0.7 mA; VCC = 0.8 V	3
Low-level output voltage	VOL			0.3	V	IOL = 3 mA; VCC = 1.1 V	3
Low-level output voltage	VOL			0.4	V	IOL = 5 mA; VCC = 1.4 V	3
Low-level output voltage	VOL			0.45	V	IOL = 8 mA; VCC = 1.65 V	3
Low-level output voltage	VOL			0.6	V	IOL = 9 mA; VCC = 2.3 V	3
Input leakage current (A inputs)	II	-5		5	µA	VI = VCC or GND; 0 to 2.7 V	3
Power-off leakage current	Ioff	-10		10	µA	VI or VO = 2.7 V; VCC = 0	3
Supply current	ICC			10	µA	VI = VCC or GND, IO = 0; VCC = 0.8 V to 2.7 V	3
Propagation delay A to Y (tPLH)	tPLH	1.2		3	ns	CL = 15 pF; VCC = 1.2 V ±0.1 V	4
Propagation delay A to Y (tPLH)	tPLH	1		2.2	ns	CL = 15 pF; VCC = 1.5 V ±0.1 V	4
Propagation delay A to Y (tPLH)	tPLH	1	1.8	2.5	ns	CL = 15 pF; VCC = 1.8 V ±0.15 V	4
Propagation delay A to Y (tPLH)	tPLH	0.9		1.6	ns	CL = 15 pF; VCC = 2.5 V ±0.2 V	4
Propagation delay A to Y (tPHL)	tPHL	1		3.1	ns	CL = 15 pF; VCC = 1.2 V ±0.1 V	4
Propagation delay A to Y (tPHL)	tPHL	0.6		2.3	ns	CL = 15 pF; VCC = 1.5 V ±0.1 V	4
Propagation delay A to Y (tPHL)	tPHL	0.6	1	1.9	ns	CL = 15 pF; VCC = 1.8 V ±0.15 V	4
Propagation delay A to Y (tPHL)	tPHL	0.6		1.2	ns	CL = 15 pF; VCC = 2.5 V ±0.2 V	4
Propagation delay A to Y (tPLH)	tPLH	1	2	2.5	ns	CL = 30 pF; VCC = 1.8 V ±0.15 V	4
Propagation delay A to Y (tPLH)	tPLH	0.6		1.2	ns	CL = 30 pF; VCC = 2.5 V ±0.2 V	4
Propagation delay A to Y (tPHL)	tPHL	0.9	1.5	2.3	ns	CL = 30 pF; VCC = 1.8 V ±0.15 V	4
Propagation delay A to Y (tPHL)	tPHL	0.8		1.8	ns	CL = 30 pF; VCC = 2.5 V ±0.2 V	4

CAD (KiCad official)

Symbol: SN74AUC2G07DCKR
Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
3D model: SC-70-6 (KiCad packages3D, STEP)
3D model files: sn74auc2g07dckr-etched.step / sn74auc2g07dckr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74auc2g07dckr.step / sn74auc2g07dckr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (19 pp, sha256 806c6162c6a773b0, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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SN74AUC2G07DCKR

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