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Contents

README

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SN74ABT540NSR

Texas Instruments · Inverters · SOIC-20-208mil

SN74ABT540NSR from Texas Instruments, in a SOIC-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Output Enable 1 input, active-low; all outputs are high-impedance when high.
2 A1 input Data input 1; accepts logic levels from 0V to VCC with VIH ≥2V and VIL ≤0.8V.
3 A2 input Data input 2; accepts logic levels from 0V to VCC with VIH ≥2V and VIL ≤0.8V.
4 A3 input Data input 3; accepts logic levels from 0V to VCC with VIH ≥2V and VIL ≤0.8V.
5 A4 input Data input 4; accepts logic levels from 0V to VCC with VIH ≥2V and VIL ≤0.8V.
6 A5 input Data input 5; accepts logic levels from 0V to VCC with VIH ≥2V and VIL ≤0.8V.
7 A6 input Data input 6; accepts logic levels from 0V to VCC with VIH ≥2V and VIL ≤0.8V.
8 A7 input Data input 7; accepts logic levels from 0V to VCC with VIH ≥2V and VIL ≤0.8V.
9 A8 input Data input 8; accepts logic levels from 0V to VCC with VIH ≥2V and VIL ≤0.8V.
10 GND power_in Ground, power supply return (0V reference).
11 Y8 tri_state Data output 8, 3-state output; high-impedance when OE1 or OE2 high; sources 32mA or sinks 64mA at VCC=5V.
12 Y7 tri_state Data output 7, 3-state output; high-impedance when OE1 or OE2 high; sources 32mA or sinks 64mA at VCC=5V.
13 Y6 tri_state Data output 6, 3-state output; high-impedance when OE1 or OE2 high; sources 32mA or sinks 64mA at VCC=5V.
14 Y5 tri_state Data output 5, 3-state output; high-impedance when OE1 or OE2 high; sources 32mA or sinks 64mA at VCC=5V.
15 Y4 tri_state Data output 4, 3-state output; high-impedance when OE1 or OE2 high; sources 32mA or sinks 64mA at VCC=5V.
16 Y3 tri_state Data output 3, 3-state output; high-impedance when OE1 or OE2 high; sources 32mA or sinks 64mA at VCC=5V.
17 Y2 tri_state Data output 2, 3-state output; high-impedance when OE1 or OE2 high; sources 32mA or sinks 64mA at VCC=5V.
18 Y1 tri_state Data output 1, 3-state output; high-impedance when OE1 or OE2 high; sources 32mA or sinks 64mA at VCC=5V.
19 OE2 input Output Enable 2 input, active-low; all outputs are high-impedance when high.
20 VCC power_in Positive power supply voltage; recommended operating range 4.5V to 5.5V for SN74ABT540.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-208mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74ABT540NSR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-208mil (KiCad packages3D, STEP)
  • 3D model files: sn74abt540nsr-etched.step / sn74abt540nsr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74abt540nsr.step / sn74abt540nsr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (18 pp, sha256 13be7ff9fbec7951, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF