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SN74LS169BN
Public Made by Adomby adom
Texas Instruments Counters / Dividers, PDIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LS169BN
Texas Instruments · Counters / Dividers · PDIP-16
SN74LS169BN from Texas Instruments, in a PDIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | U/D | input | Up/down input: counts up when high and counts down when low, taking effect on the next clock pulse. |
| 2 | CLK | input | Buffered clock input that triggers all four master-slave flip-flops on the rising (positive-going) edge. |
| 3 | A | input | Data input A, preset into the counter synchronously when LOAD is low. |
| 4 | B | input | Data input B, preset into the counter synchronously when LOAD is low. |
| 5 | C | input | Data input C, preset into the counter synchronously when LOAD is low. |
| 6 | D | input | Data input D, preset into the counter synchronously when LOAD is low. |
| 7 | ENP | input | Active-low count-enable input; both ENP and ENT must be low to count. |
| 8 | GND | power_in | Ground. |
| 9 | LOAD | input | Active-low synchronous load input; a low level disables counting and sets outputs to agree with data inputs after the next clock pulse. |
| 10 | ENT | input | Active-low count-enable input that is also fed forward to enable the carry output; must be low to count. |
| 11 | QD | output | Counter output D, the most significant bit. |
| 12 | QC | output | Counter output C. |
| 13 | QB | output | Counter output B. |
| 14 | QA | output | Counter output A, the least significant bit. |
| 15 | RCO | output | Active-low ripple carry output that pulses low at overflow to enable cascaded stages. |
| 16 | VCC | power_in | Positive supply voltage. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-16 |
| Category | Logic ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating free-air temperature (orderable range) | 0 | 70 | °C | 12 |
CAD (KiCad official)
- Symbol:
SN74LS169BN - Footprint:
Package_DIP:DIP-16_W7.62mm - 3D model: PDIP-16 (KiCad packages3D, STEP)
- 3D model files:
sn74ls169bn-etched.step/sn74ls169bn-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ls169bn.step/sn74ls169bn.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
64b70ed10dca50ff, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).